What is DMA? Direct Memory Access Explained!! (SIMPLIFIED)

DAM explained,if you have any doubts please feel free to comment below , I WILL RESPOND BACK WITHIN 24 HRS.
Thanks for watching , PLEASE DO SUBSCRIBE , IT WILL HELP , ME A LOT, PLEASE.

[@sharjeelimtiaz8785]

You have very impressive method of explaining things . Respect from Pakistan

[@satyamjain7461]

Simply and shortly explained.

[@SaswatiParida]

Very informative video thank you 🙃 Thank you for the 2 min summary 😊

[@KarthikVippala]

Your welcome🙏

[@PrivateYouTubeE]

Excellent explanation! I understand now. Thank you!

[@KarthikVippala]

Thank you so much for your time to share the valuable feedback 🙏

[@EmonRezaBD]

Very good explanation

[@rehankiriella]

I understood the video very well! Thank you so much! It would be amazing if you could just type out the most important parts out, please!

[@KarthikVippala]

Namaaskaram _/\_ Rehan, thanks for the support , good luck and great health :)

[@rehankiriella]

@@KarthikVippala you too!

[@PSECLakshmiM]

Hello sir, does superscalar processor also require DMA controller? DMA controller will service the software program written for large amount of data transfer? I want to know how many clock cycles will be required for the 2MB data, if processor service that and what if DMA controller service that in terms of instruction fetch, decode, execution, memory write back etc..? Does DMA controller communicates with DRAM controller for address translation when software request is made?

[@saqibshinwari78]

Excellent explanation… thank u sir

[@KarthikVippala]

Your welcome, please suggest topics for upcoming videos 🙏

[@nethminanavodya3327]

Excellent explanation, thank you so much !!!

[@KarthikVippala]

Namaaskaram _/\_ Navodaya, thanks for the support , good luck and great health :)

[@sherirajput3952]

good effort sir

[@KarthikVippala]

Thank you🙏

[@Ms.A.CarolineMary]

Bus cycle? Possible DMA Configurations?

[@shivamk843]

Awesome explanation ... thanks

[@KarthikVippala]

Namaskaram shivam 🙏 , thanks for the support, good luck & great health 👍😊

[@emmanuel5566]

I'm still confused. The step marked 2 is still requiring CPU to overlook the process. So how is CPU completely removed from the data transfer loop?

[@sherriff2548]

A nice explanation,,

[@KarthikVippala]

Thank you so much👍 FRANCIS

[@csabagergely2611]

Verry good explanation! Keep it up

[@KarthikVippala]

Thanks for the support 👍 . Any topic suggestions for future video , if I know it I will make it . Thanks once again 🙏

[@johnbagshaw1494]

Hi, thanks for the video. How do I resolve a DMA issue where it sends a wrong interrupt after a certain time frame (say 500 ms)when it's expected to continue its function?

[@sarojsharmatimsina1276]

Awesome explanation sir ♥️ Can you tell more step 1? Configuration of register part!.

[@KarthikVippala]

Namaskaram Saroj _/\_ ,thanks for the love and support, Registers used for addr ,cnt are set to a particular value according to requirement, that is configuration. Good Luck & Great health :) take care.

[@sarojsharmatimsina1276]

@@KarthikVippala thankyou sir Keep your great work ahead♥️

[@shreyasrai]

My doubt is mainly on the very first step of CPU setting up the REGISTERs in the DMA. How does the CPU know what is the address and count of data that DMA has to process from the device controller buffer ? I am clear on the steps you explained then after but I was not able to figure out what is the trigger for CPU for the very 1st step. Will there be an interrupt from I/O device to the CPU indicating there is data to be transferred?

[@KarthikVippala]

Hey sheryas , thanks for asking the question , In memory we have descriptors which contains start addr and length information . When memory transfer starts the cpu gives the descriptor address to dma processor and it will perform the transfer. Yes I/O will communicate with CPU about the requirements , then cpu will write it in memory as descriptor and address of descriptor to dma. Hope this clears your doubt, if you have any questions please feel free to comment, I am happy to help you 👍 Please do subscribe, it will help me a lot 👍

[@shreyasrai]

@@KarthikVippala Thanks for clarification!!

[@KarthikVippala]

@@shreyasrai Thanks for the support , can you suggest a topic if I know that topic I will make a video for you . Good luck 👍

[@rupeshraghatate9734]

Hey Shreyas I have a dought that ,does the DMA transfer is voluntary or it requires trigger from CPU for start of transfer,and what if data is overwritten means in case of UART communication it can happen

[@msuhail4741]

What happens when DMAC receives DMA request from another channel while its is serving one ???

[@iidentifyasaa-10warthogbrr10]

Thank you.❤️❤️❤️❤️❤️ Subbed

[@KarthikVippala]

Thanks for support, good luck & great health 👍😊

[@kewtomrao]

You have shown only for input I/O devices right?

[@kristoff1463]

Many thanks. It's so clear

[@KarthikVippala]

Thank you so much 👍

[@phucphamhuu4809]

crystal clear! thanks a lots

[@KarthikVippala]

Namaskaram 🙏, thanks for the support, good luck & great health 👍😊

[@AtAGlimpse_UB]

Does DMA follow Interrupt method or polling method? Please explain

[@KarthikVippala]

Thank for asking , it follows interrupt method, good luck & great health 👍😊

[@432shibyavisvaiswaran8]

How does the cpu know what count number to initialise for memory transfer of different sizes

[@harshv5512]

What is the value of count when the cpu set dmac? Is it 1?

[@KarthikVippala]

Hey harsh thanks for asking the question, The value of the count will be based on how much data needs to be transferred it will vary upon the size of transfer. Hope this clears your doubt,if you have any more questions please feel free to comment 👍

[@rohitryadav4864]

If CPU is required to control the memory writing or reading from i/o device then what is use of putting DMA . As per your description it is like CPU is getting more load because of DMA. and How come DMA say I/o to send data to memory without accessing bus?

[@sahilurban1495]

CPU need not to reset it's register , instead it reset dma register , so cpu avoids context switch which make it fast

[@bourbajoollof4232]

THANKS THANKS THANKS THANKS THANKS THANKS

[@KarthikVippala]

Namaskaram 🙏 Bourba, your welcome, good luck & great health 👍😊

[@moazelsawaf2000]

Thank you so much sir ❤❤

[@KarthikVippala]

Your welcome, good luck, good health 👍😊

[@薇季芬]

2:13 talk deeply in dma 3:01 bus

[@n.hariprasad4629]

can you explain about the memory management unit in embedded systems

[@KarthikVippala]

Can you please be specific about the topic ?

[@n.hariprasad4629]

@@KarthikVippala I am asking about what are the various memory management methods performed by MMU in a CPU of a system

[@KarthikVippala]

Do you mean virtual memory , segmentation , mmu ?

[@n.hariprasad4629]

@@KarthikVippala yes exactly

[@KarthikVippala]

Thanks for asking hari, I will do the video ,but it will take time👍

[@socal1609]

Is DMA included in phone from factory OR does it need to be installed? I have a Samsung ZFold3 and it suddenly appeared 3 days ago. Am I being hacked?

[@EpicEscapess]

Hey do you do any c++ and pcileech framework

[@KarthikVippala]

Namaste 🙏 randysub3 , Yes I do c++, thanks for asking good luck and great health 👍😊

[@suhailyousafzai]

just woah!

[@KarthikVippala]

Namaskaram 🙏 suhail, thanks for the support, good luck & great health 👍😊

[@143glnr]

I want to know how much is value of count set by cpu?

[@KarthikVippala]

Count value will be varied upon design

[@143glnr]

And how did know by cpu?

[@KarthikVippala]

Based on design specification , the data is provided to cpu , and inturn cpu will provide it to register in controller. Good luck, good health 👍😊

[@balasivacm0264]

Explain about memory hierarchy

[@KarthikVippala]

Namaskaram _/|\_ balasiva, can you be little specific, Thanks for asking , good luck & great health, Take care :)

[@-zapgod-3616]

hey can u answer in 24 hours guaranteed

[@KarthikVippala]

Hmm based on the question🙋

[@prabhat1811]

That accent's FAKE AF!

[@KarthikVippala]

Yup it is 😊, I am improving on it , thanks for the support 😊 Good luck & great health 👍😊

[@futuristictechnology..531]

[@KarthikVippala]

Kya hu bhai

[@futuristictechnology..531]

@@KarthikVippala sorry bahi koi hindi me nahi pda rha tha 8237 dma issliye gussa lag gyi

[@futuristictechnology..531]

@@KarthikVippala kal exam hai aur ajj dma pad rha😅😅😅

[@jasonbrown5143]

use this to try and force it [HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Enum\PCI\VEN_8086&DEV_9D03&SUBSYS_22118086&REV_21\3&11583659&0&FA\Device Parameters\ScsiPort] "EnableUltraDMASupport"=dword:1

[@ruthielyleus3272]

Thank you this was very clear.

[@KarthikVippala]

Thank you🙏