Complete Concept of CMOS Inverter for Placements || Analog Electronics (Part 1): Placement Course II

Analog Electronics (Part 1) : Placement Course II -
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Master Analog Electronics: Challenging Question Series -
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[@shikhargovil611]

Sir please make a video on which subjects and skills are required for digital design profile.

[@abhishekbabar1246]

1:27:54 you forgot to take -|Vtp| in the calculations same for the Kn

[@patishivani8376]

Thank you

[@nitinchinmay260]

Please explain why is it Vi/2 and not Vi at 1:12:51 ?

[@biswajitgarai7063]

initially when vin = 0 in both the types of inputs(i.e. pulse and ramp), then two different situations come by taking two different logics. at Vin = 0, for pulse i/p case pmos comes in saturation region but at vin = 0, for ramp i/p it comes in linear region. please clear my doubt.

[@maneesh96]

Bcz load is not connected..v0 will vdd immediately putting VSD zero so IDp zero which is possible only on linear...

[@arghya.7098]

1:09:52 can't we formulate the condition of saturation of both PMOS and NMOS like this: For PMOS: V_SD >= V_ov which implies: V_o = V_ov which implies: V_o >= V_dd/2 - Vtn

[@hardikjain-brb]

24:29 C is also increased so speed increases surely only when it drives a higher order load cap of some pF let say

[@qemmm11]

Thanks Sir😊 Nice

[@biswajitgarai7063]

I have one doubt. for the first half of the period(i.e. 0 - T/2) [at 12:50], will the peak value be attained only at T/2 or will it reach the value earlier? As it is mentioned that T is a very large value.

[@abhishekbabar1246]

as no current is flowing through PMOS for 0-T/2 the voltage will appear instantaneously as depicted by the graph shown later

[@deeplearnacademy3078]

sir, I have a doubt that if the aspect ratio (w/l)p is greater than (w/l)n and vice versa then on which side the VTC curve shifted

[@AdityaKumar-nv3or]

Kn and Kp are directly proportional to (W/L) respectively. So if (W/L)p > (W/L)n then switching threshold will decrease because the denominator term (1+ root Kn/Kp) would increase compared to the numerator part (root Kn/Kp * vth) as Vth is mostly less than 1.

[@mdmahtabalam1324]

Sir nai IIT Jammu vlsi liya hu

[@saikrishnal7249]

pls upload cmos buffer video

[@mdmahtabalam1324]

🙏