DVD - Lecture 4a: Logic Synthesis - Part 2

  Рет қаралды 6,224

Adi Teman

Adi Teman

Күн бұрын

Пікірлер: 6
@lancelotrampaculan2075
@lancelotrampaculan2075 Жыл бұрын
You're a legend. Thanks a lot for these very informative lectures. Can you suggest some free software I can use for learning RTL Coding and Functional Verification? I want to be a Digital Logic Designer soon. I am just so confused as to what these different softwares can/cannot do, I am a beginner.
@AdiTeman
@AdiTeman Жыл бұрын
I am not an expert on all the different software options, and since I have access to the industrial EDA tools at the university, I haven't explored this much. That said, I know that there is a student version of ModelSim that is freely available and powerful enough to learn with and tools from Xilinx and Altera (Intel) for FPGA design come with good design and simulation IDEs that should be available free of charge. An open source simulator called "Verilator" is very good and can plug into VSCode. So I believe there should be quite a few options out there. Update us if you find something that is useful!
@petercheung63
@petercheung63 Жыл бұрын
thx
@AdiTeman
@AdiTeman Жыл бұрын
You're welcome
@Artbyshrinidhi
@Artbyshrinidhi Жыл бұрын
what is leaf cell ? what are non - boolean modules?
@AdiTeman
@AdiTeman Жыл бұрын
Hi, In general, logic synthesis takes RTL and turns it into Boolean logic gates. HDLs "know" about Boolean logic. They know what an AND and a NOR are and what a flip flop is. But they don't know about "weird" things like an ADC or an SRAM. These are what I refer to as "Non Boolean Modules". Such "Non Boolean Modules" are also what I refer to as "Leaf Cells". Similar to a tree, where you have a trunk and then branches and finally leaves, but you can't "go any further", leaf cells are when "you can't go any further". In other words, you can have a module (in an HDL) that instantiates another module and another module and so on, but at some point you get to the "most inner" module which is "the leaf" of the design. This can be either a Boolean expression (such as A&B), which the HDL "knows about" (as I mentioned above) or it can be a "weird thing" (like an ADC or SRAM) that the HDL "doesn't know" about. To synthesize, all these "can't go any further" expressions must be mapped to a physical entity that can be fabricated in silicon. These entities are the "leaf cells". For Boolean logic, they are the inverters and NAND gates and other components of the standard cell library. For the Non-Boolean Logic, these are "custom-designed" or "analog" blocks that are designed with transistors and described with abstract (LEF, LIB, etc. as discussed in the following lectures).
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