Every PCB Designer Needs To Know This About PCB Track Impedance | TDR | Eric Bogatin

[@bobby9568]

You are #1 pcb teacher on the internet!

[@jonathanhernandez4304]

I know it's over a year old. But I still wanted to thank you for this explanation. I've been an Amateur Radio operator since 1998. This is the first time I've had an explanation on impedance that I can actually visualize when thinking about it. I truly get that values of SWR reflection are based on the design application of the circuitry. I understood it before at an unclear level. Now it's much much clearer. Thank you

[@dmitry.shpakov]

Robert, I like it when you ask "simple" questions, as if I were asking these questions. Thank you very much!

[@calvin-7540]

impedance is very similar to water waveform movements when encountering different heights of obstacles above or below the water levels.

[@guillep2k]

Super useful video. Even when we're designing for lower frequencies, this kind of knowledge is a "reality check"; knowing the boundaries, knowing when will we get in trouble. It's similar to what Eric said about "meassuring in reality what's been calculated in the simulation to get confidence in it". When you know this stuff you get confident and can avoid a lot of pitfalls or even extra work. Good job as always!!

[@DoctorKarul]

Thank you for finally asking 'does it really matter, when does it matter' and he said above 5Ghz. I'm doing boards under 1Mhz and 'good practice' and 'good design' are very different. We've said 'high speed' and 'low speed' many times, but never with numbers to calibrate the expectation.

[@remy-]

I thought Bogatin mentioned 1 Ghz (risetime 1 ns) before. And even with lower speeds, rise times are more and more shortened by manufacturers. For me: with I2C/SPI you can’t mention highspeed, but in my opinion its good to just apply more consistent rules dor myself (best practice).

[@veles_hw]

1GHz this frequency that necessarily need to use best practices for high speed circuit. Also you can use this practice for low frequency/speed and it will improve design your PCB. If you don't think about quality signal integrity, many solution in the your PCB will work up to 2-3 GT/s with only basic rules (stack up, impedance calculated).

[@cpad007]

Keep in mind frequency but perhaps more important is the RISE/FALL TIME of your signals. You might have a slow clock or something but if its edge is sub nanoseconds, it will contain a lot of high type frequencies that might catch you. A 1 ns edge rate contains about 350 MHz of frequency bandwidth. 0.35/tr is the ~3 dB bandwidth of an edge.

[@jasonthorpe3470]

As of this moment, the tag line of this video is "why should you put holes in your pcb" which is the best tag line I can think of in terms of honesty and non-triviality. This is the standard to which all tag lines should strive for! Oh, and the video was great too!

[@Fogaata]

What a beautiful video, the guest is so patient and articulates his explanations so well. Fine teachers make me feel so smart because I actually understand. Thank you!

[@dosgos]

Didn't know I was interested in Signal Integrity. A fascinating interview and very easy to follow.

[@remy-]

My god, you are a golden team! I followed the SI basics course from Bogatin; it’s a very, very big gift. And 90% of my PCB knowledge is learned with your course/help/video’s. Thx! So interesting!

[@quickrd2095]

i am also working my PCB with 2.4 Ghz Radio Signal For Wifi signal and 900-1800 Mhz Signal for GSM - GPRS Network Wireless Commutation.. So this video Are Gold for me... Thank you very much my Dear....

[@ionciubotaru]

great job. I learned how to proper design PCB's viewing your videos. Keep up the good work.

[@michalszymi40]

The same technology (OTDR) is used with optic fibre cables fault detection. You can identify the location where the cable is broken, hence, it is easier to fix it. But now I know how it works . Thanks Robert!

[@RobertFeranec]

Thank you Michal

[@Parvi_]

Learned a lot, very informative video. Thanks Robert and Eric. 🙂 Good Job

[@GShankara]

Excellent information as always , Dr. Bogatin. Thank you Robert for bringing this presentation together fr the benefit of the EE community.

[@nameredacted1242]

AWESOME!!! MUST-WATCH FOR EVERY PCB DESIGNER THESE DAYS!!!

[@ahmedsherif182]

Always nice to see your videos

[@viktorhonchar]

Thank you Very interesting overview

[@zacharysquier3485]

I'm taking a class on signal/power integrity this semester, and we are studying from Eric's book! What a surprise that this video came to my recommended section. Thanks so much for making this video!

[@davidswartzendruber4502]

Excellent information! Answered a lot of questions.

[@boblake2340]

This man knows his stuff.

[@JawwadHafeez]

Excellent description ... very clear. Eric is just amazing. Very learned and impressive Thank u very much

[@CAPSTONEization]

Best explanation of this concept, never found one this detailed. Thank you so much.

[@dale116dot7]

Very interesting presentation. I mostly work with low speed circuitry (mostly

[@willhaylock3769]

Excellent educational video, Eric's books are a great source for learning too.

[@aviandragon1390]

Fascinating. Thanks to Eric for his time.

[@Marvin_Wang]

Really appreciate for your video, it do help a lot for SI knowledge. Thx

[@Ghostpalace]

Excellent video!

[@bgebbq314]

Best darned video on the Internet.

[@demoncloud6147]

I wish I had an instructor like Eric in my undergrad, he is dope !

[@ArsalanAhmadi-c8x]

Very informative video. Thank you very much!

[@JLCPCB]

Very informative video. Good job! 😉

[@IXSigmaXI]

great discussion of the topic. love this.

[@finot3046]

Super, Great Job.

[@tchiwam]

AT 1:02:30 we can also see a slower/faster signal due to the impedance change :) Nice !

[@jebinsatheeshkumar]

Hi Robert thanks for creating this video. It was good one.Can you think of compiling all your topics in a video course or an book?

[@tamilselvanselvaraj1798]

Love to learn new things

[@halisidrysdale]

At this point, with so much overlap with radio frequency, if Eric said, "...the best step forward would be to study for amateur radio...", the ham community would gain 1000's of very experienced electronics designers, and the electronics community would gain a huge amount of RF knowledge that is bread and butter of good technical radio usage :) A win-win... not that I'm biased (MW0TUI) :D

[@jimjjewett]

So if impedance is too high, the signal may not get through, but if it is too low, lots of power will be wasted. Makes sense. If, in the middle of the transmission line/trace, the impedance changes to a higher amount, parts of the energy will reflect, which distorts the signal (because of the frequency-specific impedance differences) and gives it another chance to mess with other signals (by EMI, or crosstalk, or by bouncing again and still being there when the next signal comes through, etc.) What happens if the impedance *decreases*, like with a track being widened near the end? I've found some warnings that in the audiophile world, it would draw more than the expected power and blow out a speaker, but what is the PCB equivalent? Does it smear out the signal? Overload a receiving pin? Lower the impedance of the whole transmission line through a transitive effect? No real harm, except that if the signal does bounce/reflect (for example, at the actual pin), this gives it a chance to bounce back again with very little delay? The Fiber weave effect (resin having a different Dk than glass) means that the impedance can go (slightly) up and down along a single trace, and Coonrod has shown this mattering, but apparently not very much until ~77G radar. Is it just this "not until very high speeds" that makes it OK to change trace widths at pads, or under a BGA? Is width of via (or annular ring) irrelevant for being too short, even when the stubs start matter?

[@LebrelZ]

One thing with loosely vs tighly coupled diff pairs is that loosely coupled diff pairs are more tolerant of non-uniformities. Say for example you have to temporarily split your pair for an intra-pair length matching meander, or to get two AC coupling capacitors, or maybe you transition to a twinax connector or it's an RF diff pair that you open up to two SMA connectors for testing. Then, loosely coupled is the way to go, much more robust against these non-uniformities. They are also more tolerant to manufacturing variations. On the other hand tightly coupled pairs are more immune to common mode noise and their fields are "tighter" so they radiate less, specially for microstrips.

[@uwezimmermann5427]

Another great video!

[@markworkman6544]

very good questions Robert ! Thanks...

[@DavidElbaze]

First, many thanks again for your high quality videos. I think having this as a discussion makes it much much interactive to watch than a classic teaching video. One question I have is, what software could you recommend to simulate PCBs impedance ? Are there open-sources or freeware tools for this kind of 3D solvers ? I heard of Sonnet or smthing like this, but the licence is a bit expensive for hackers like me.

[@JeffreyBoye]

This is an unintuituve design practice, thank you for covering this.

[@omeridan8815]

Loosely coupled diff pair is also nice because you might not know if the interconnect will be used for lvds or lvcmos, just like in fpga dev boards

[@milantrcka121]

I have a little bit of a problem with the term "instantaneous" impedance. That would imply the impedance is changing or can change with time. I am interpreting the term to mean local "impedance discontinuity" as the cause of reflections in a transmission line of defined impedance. Of course, TDR is time-domain reflectometry so the time is mixed in the terminology.

[@tomaszwota1465]

This is all a bit over my head (as a hobbyist getting up to speed... slowly) but I kind of struggle with that term myself. Instantaneous means "in an instant" or "in a given instant", but it sometimes kind of sounds like he's talking about something else. I'm confused.

[@remy-]

Question: for designing a via with one or more surrounding return via’s (GND). For impedance matching the GND plane clearance at the signal via is changed (more clearance -> higher impedance). For preventing ground bounce it’s important to keep the signal layer and return layer (GND) close together. (The cavity): so in theory you should place the return via’s as close as possible to the signal via. But by closing them together the GND clearance is also brought closer, lowering the impedance of the signal via. Can you say that the via plating shouldn’t pass by the GND-clearance diameter of the signal via? And maybe you can say that the created via discontinuation is less important than the GND/return path discontinuation?

[@veles_hw]

Excellent, thank for much interesting information!

[@micah2936]

As a hobbyist who is just learning this for personal projects, impedance is not only difficult to understand due to being calculated off of imaginary numbers, but it’s difficult to figure out how to implement it into design calculations when every video about says it relates to AC voltage, but then data sheets for some components tell you to keep a low impedance or say some things have a high impedance when the IC is DC current? So I see evidence that it relates to DC, or maybe even just frequencies but I can’t find any articles or videos that explain it

[@_-martin-_]

Robert, you really should make a review of the newly released KiCad 6.0 - it is an awesome release with a lot of good changes.

[@bartek153]

Brilliant !

[@jrnvnjk]

I think the best analogy for reflection would be an echo.

[@xiaopingli7814]

Thank you and I have one question: you talked about removing the GND under components (for example AC coupling caps). But the signal return path is just underneath the component. Will you actually break the signal return path by doing so? It means you probably have less signal reflection but worse EMI?

[@RobertFeranec]

I should ask that ....

[@filipswit]

@@RobertFeranec You can ask as well this: When there is a cutout(L2) under capacitor/pad, should the under layer (L3) be the solid ground or it can be power layer or even signal?

[@alfredoo2048]

Good question, I wish to know from Eric or Robert as well. What I think is learned from PCIe gold finger design guideline, is better to void the copper underneath the gold finger of PCIe high speed signal down to certain depth to reduce parasitic capacitance , have minimal return and insertion loss and reduce crosstalk . But eventually, the return signal need to be provided at specific inner layer as well. Looking forward to Eric or Robert answers.

[@CAPSTONEization]

Basic Question - When you say "rise time" what are you referring to? - Thank you

[@strictnonconformist7369]

The voltage from a lower level to a higher level has a maximum rate, the slew rate: a theoretical perfect square wave would have zero rise time due to an infinite slew rate, because it is a perfect vertical transition. In reality there is no such thing as a perfect square wave because nothing can change that fast: that fast of a change requires infinite frequency components added together to achieve that. Back in the real world, why rise times matter more than frequency of the rest of the signal is because rise and fall times are composed of all those high frequency components. Look up the mathematics of square waves to see how they decompose into series of other waves.

[@ngiridhar2822]

How to know how many layers are required to a pcb before start the routing of any pcb for stackup setup I mean how many layers are needed (example: whether 2layer or 4layer or any other)

[@0MoTheG]

Loss is relevant because the signal does not only get smaller but also more distorted.

[@vishwakvishu2023]

Hi Robert In DDR interface driver impedance is matched with characteristic impedance what about receiver load impedance how it will be matched?

[@優さん-n7m]

What are S-Parameters in PCB?

[@conesillyvalley7182]

Wonder why the CAN bus differential impedance is 120 ohms

[@AhmedIsmail-sw6so]

dear , how do make noise generator using zener diode and how do you measure the signal , and what other noise generator can be used in jamming circuits, please answer may question

[@dekutree64]

What does it even mean to say a transmission line has 50 ohm impedance? Doesn't impedance depend on frequency? What frequency are we talking about?

[@robotBailiff]

I was following along and my cat spilled honey all over my computer! Never again, bro 😆

[@Gengh13]

Thank you, very useful as usual.

[@marienverx1852]

Can somebody help me to find that simulation program, shown in the video: Signal behavior on PCB (flash player?)

[@tecircuit_pcb_pcba]

great job . thank you .

[@JohnSmith-iu8cj]

i dont like that this is a long video and nowhere i can find the information that the thumbnail clickbait image suggested. the image says "why make a hole in the ground plane". where can i find the answer? please provide a timestamp.

[@robertmonroe9728]

Very useful

[@tobeclear4021]

这么牛逼的学习视频为什么看的人这么少？ 看来，国外电子应用少？

[@MatzeMaulwurf]

Adobe Flash Player in 2022. OMG 😱!

[@MichaelKingsfordGray]

There is NO SUCH THING as "instantaneous"!

[@winsumartmachinerygroup]

whats this ? Encoder ?

[@winsumartmachinerygroup]

oh sorry it's PCB

[@andrewwhite1793]

50 Ohms impedance is not common because of digital electronics. It is common because it is the impedance of a monopole antenna. Common coaxial cable has an impedance of 50 Ohms to match the monopole antenna. Test equipment tends to have 50 Ohms on coaxial inputs as the terminated setting. Note that high impedance input impedance such as 1M Ohms is not suitable for practical transmission line design. Designers of high speed systems choose 50 Ohms to match the test equipment. Custom impedances are available, but this is an expensive option.

[@markworkman6544]

I don't like the term "line" ! Is that the same as PCB "trace" or "track"

[@strictnonconformist7369]

A circuit path on whatever format doubles as an antenna by definition: circuits laid out correctly optimize for desired operational characteristics and only allowing them to become radio transmitters and receivers that can be used that way when that is the intended purpose. Circuitry not designed properly puts out too much RFI/EMI and is also sensitive to it, causing signal integrity problems.

[@jimjjewett]

Without a timestamp, I'm guessing that it is short for "transmission line", and on a PCB that would normally be a trace/track.

[@soranfatah1033]

1:27 video so long !! ..

[@boblake2340]

It is not the job of the board designer to select the char impedence of a track. It is the job of the engineer, based on detailed calculations. A lot of time wasted on this topic for a board design er.