HWN - MOS Switches Interview Questions

Hi fellow (and future) engineers!
In this episode we examine a common interview question about MOS Switches.
Need FREE help preparing for your interview? E-mail us at: [e-mail]
Answer:
docs.google.com/spreadsheets/...
Welcome back to another episode of Hardware Ninja! Ever wondered how to get a job as a Hardware Designer in some of the top tech companies like Microsoft, Google, Tesla, Apple, Facebook, etc?
The interview process employs many application based questions whether you're a recent college grad or an experienced applicant. It doesn't matter if you want to work for Elon Musk, Tim Cook, or the up and coming start-up you heard about. We're here with curated material of real life technical interview questions.
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[@coolwinder]

Amazing!

[@biswajit681]

This answer is correct considering Vg> Vdd otherwise answer should be Vg - Vth .. correct me if I am wrong

[@HardwareNinja]

Hi Biswajit, Thank you so much for being here and contributing to the community! You're absolutely right, the interviewer, in this situation, assumed that the step response is from 0 to supply. Great catch!

[@biswajit681]

@@HardwareNinja Many thanks for clarifying and please keep posting videos 👍

[@surajitrabidas8606]

We can use a pmos, as pmos is a good 1 circuit and act as a strong pull up circuit, so we can charge all the upto Vdd..

[@RitayanMitraggmu]

The solution is the simplest, I agree. But I was thinking can we use charge pump to the gate of the NMOS? That will also work right?

[@HardwareNinja]

Hi Ritayan, You're absolutely right, it would work. However, remember that as an engineer you're always after the most efficient solutions. A charge pump by definition has less than 50% power efficiency. It also adds cost, complexity, etc for something that could be designed the right way from the beginning. Hope that helps clarify the question.

[@RitayanMitraggmu]

@@HardwareNinja I must say, this cannel is doing a great job. If possible, please make a video on how to intuitively find the poles and zeroes of a circuit. That would be really helpful.

[@mu11igan]

The answer to this question completely ignores subthreshold conduction and leakage effects. In reality, the NMOS will charge the cap up to VDD-VTH *quickly*, but then continue to charge it up due to leakage/sub-Vt conduction. If you wait long enough, it will charge to the supply.

[@HardwareNinja]

Hi, Thank you so much for your comment and contribution to the community! While you are right, and leakage WILL affect the voltage at the output, remember that this is an interview question. Therefore, it's about spotting what's wrong with a given implementation and understanding the basic theory of operation. After all, you wouldn't want to wat "long enough" for your phone to unlock its screen right? :)

[@vasanthkumar4128]

We should rather use a pMOS instead of nMOS assuming we have the liberty to invert the input

[@vasanthkumar4128]

Wohhooo got it right!

[@amaragni78]

That seems like a PMOS device ??2:21