Please continue making such videos. It would help students to get a job in a good company which they were unaware of.
@kollasivaramakrishna67324 ай бұрын
Thank you😇 bro for sharing....
@pavan_pelleti Жыл бұрын
CMOS inverter - charging & discharging time Clock skew - adv & disadv Types of power dissipation in CMOS inverter Latch & flipflop where we use & o/p waveform Aspect Ratio of MOSFET changes parameters of MOSFET how? Order of priority of timing,power,area while designing IC 3-types of inverters and comparing their performance Recents for Static & dynamic power dissipation and dependency on Threshold voltage Power dissipation reduction? Which parameters to vary to cover power dissipation for above Vlsi design flow Setup & hold time ( why,how,for latch too) Latch using mux Puzzles Resume
@sanu2602 Жыл бұрын
Did you attend the synopsys interview..?are you selected in the interview? Which type of technical amplitude questions are there in interview can you tell me about the your interview.....
@AVINASHKUMAR-yd1gp3 жыл бұрын
I can't really understand the question at 4:45, Realize Adder using 2x1 mux then u said using single Adder. Can you please Explain
@radhikasingh40654 жыл бұрын
Thanks a lot very beneficial your video, can you also make a video on how to do preparation? please
@PrateekSingh-wq4cr29 күн бұрын
👍👍 thanks
@jaisalashraf95363 жыл бұрын
Seems like you attended interview for Physical Design position
@elamparithiparithi33444 жыл бұрын
Useful video bro.
@joffinjoy5553 жыл бұрын
Thanks, bro.
@velmurugan474 жыл бұрын
Thanks Bro!
@dheerajchumble56024 жыл бұрын
Nice. However it would have been good if u had given the answers too.
@panther44952 жыл бұрын
what is the academic eligibility criteria for synopsis
@lisening5 жыл бұрын
Thank you
@shashwatrao69493 жыл бұрын
Bro, can you give the answers for these questions? That will be helpful
@RipunjoyGoswami6 жыл бұрын
thank you so much for sharing the video.can you share any topic related to STA...
@anantsingh123005 жыл бұрын
Refer nptel lectures on physical design
@illuruvigneswarreddy946911 ай бұрын
Please suggest good resources to learn system verilog for design verification
@pavnisharma69292 жыл бұрын
I wish you could also give answer
@sriharshakalmane2 жыл бұрын
What would a CAE engineer do at Synopsys?
@doglover9272 жыл бұрын
thanks bro....
@pavanbollimuntha23895 жыл бұрын
What is the difference between inverters you told
@Rahuljain-hj9uk6 жыл бұрын
I want to join in a core company ! I am thinking to take a training program .! Can you help me by suggesting few training centres!
@SPACE-vw4zh6 жыл бұрын
I am sorry, i won't be the right person to answer this.
@GautamRana19955 жыл бұрын
Do a course from Cdac
@harikrishnathokala2075 жыл бұрын
Thank u so much
@codecorn8030 Жыл бұрын
For softaware CS what questions are possible ?
@vatsala9004 жыл бұрын
Thanks
@basilek52996 жыл бұрын
Congrats.. jeff...
@chayannath36865 жыл бұрын
thanks man
@nitindubey54725 жыл бұрын
Does education gap matters during placements ?
@im_kay-4 жыл бұрын
Yes it is.
@saurabhshukla54922 жыл бұрын
no,only domain knowledege
@dheerajtiwari61555 жыл бұрын
will you plz give the answer of these question?
@T.Naresh6254 жыл бұрын
Can you tell answers
@KishoreKumar-0116 жыл бұрын
How to apply campus drive for synopsys 2018 bro..
@SPACE-vw4zh6 жыл бұрын
Most of the big companies do post job openings on LinkedIn. You can follow the companies you like and apply via LinkedIn itself.
@KishoreKumar-0116 жыл бұрын
@@SPACE-vw4zh okiee bro..
@uniquepersonalityisshowsco73255 жыл бұрын
tq ...brother....
@SandeepYadav-xv8dv4 жыл бұрын
Hii bro I'm trying for job vlsi can you tell which resources are good to practice and reading
@SunilKumar-ih8ei4 жыл бұрын
Maven silicon
@PainAndPleasures4 жыл бұрын
In which city/state/country was the Synopsys office located ?
@xrayonthemove4 жыл бұрын
India for sure
@akashnthampy31626 жыл бұрын
Can u refer me a standard text book...that describes..timing issues of latches...like setup and hold time for latches...not for flip flops
@SPACE-vw4zh6 жыл бұрын
Hi, Digital Integrated Circuits by Jan M Rabaey is a standard textbook on the subject. you can refer the section "Timing Properties of Multiplexer-based Master-Slave Registers" in Chapter 7 - DESIGNING SEQUENTIAL LOGIC CIRCUITS, of Rabaey (page no. 308), to see why setup and hold time exist. You could extend similar reasoning for other circuits.