MOD 12 Ripple up Counter Using T flip flop | Wave form for MOD 12 asynchronous counter

#digitalelectronics
#digitalsystemdesign
#counter
design Mod 12 ripple up counter using T flip flop
timing diagram for mod 12 asynchronous counter
wave form for mod 12 ripple counter
state diagram for mod 12 counter
state table for mode 12 counter
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[@soujatyabhattacharya1530]

Very Imfomative Video Ma'am. Please keep posting such tutorials 🙏🏼

[@TechnoTutorials2783]

Thank you

[@ShivamGupta-fu9el]

all doubts are clear now thank you mam

[@khaimshaik7460]

Excellent explanation mam keep posting

[@TechnoTutorials2783]

Thanks dear

[@utkarshprajapati7663]

If clear active only when it will get 1 therefore output of nand gate should be 1 but you have given 1 1 to nand input so output of nand will 0 so how clr will activate ??????

[@TechnoTutorials2783]

In this circuit clear is active low ( used with bubble) means it will be active when 0 will be applied to it

[@KT-gr7em]

Mam yaha pe k map use nahi karna hai kya????

[@TechnoTutorials2783]

Not required

[@KT-gr7em]

Please reply mam

[@TechnoTutorials2783]

Done

[@KT-gr7em]

Matlab asynchronous counter me direct flip flop draw karna hai kya ??

[@KT-gr7em]

Meri kal exam hai please help

[@TechnoTutorials2783]

@@KT-gr7em yes

[@KT-gr7em]

Really mam Thank you so much for your help 😊.