MOD-6 Asynchronous Counter Using JK Flip Flop | Sequential Logic Circuits | Digital Circuit Design

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[@KenyaCarVault]

A very short and precise presentation! Smart

[@thandalasaithilak1481]

Asynchronous counter chala baga cheppav darling ❤️

[@oyeha__uckya1223]

Thank You Madam❤️

[@amaynayak7242]

mam how to do the circuit diagram using k map like how we do in synchronous counter?In here i not understood why nand gate is used..

[@sharant6851]

For asyn we don't need any k map

[@puneethkurrala5151]

Well explained mam U r video is lot of useful for me

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[@gracejency951]

Very simple and clear..

[@kalpanarouthu7013]

Nice explanation mam....

[@paladinwarrior2379]

Thanks for your video, teacher!

[@galileokiprotich8418]

Super understandable

[@rambogaming2649]

Thanks 😊👍

[@seva_parmo_dharam]

Thank You so much Mam

[@luckychannel6393]

Thanks mem helpfull video

[@AnkushKumar-qg2ei]

Positive triggering mein kya difference hoga

[@bhanusrinijakalakoti9767]

Mam ek doubt .. tum asychronous me baath ke kaya..??? Mere text book me individual input hai .

[@sagaragc4200]

Design a Synchronous Mod-6 counter using clocked D Flip-flops to realize the given counting sequence 010, 001, 010, 111, 110, 101. Draw the 'State diagram'. Show the 'Application table for D Flip-flop'. Workout the 'Excitation table' to realize the random counting sequence given. Generate the minimal sum logical expressions for Flip-flop inputs. Implement the relevant logic circuit of Mod-6 counter designed. Plz send this question answer plzz

[@yuvrajpradhan5050]

it is a mod 6 counter ..shouldnt you take 6 values from 0-5 and not 7 values

[@maxpayne7302]

Dunno if it's late but I think she has to take the value 6 to give clear. So you are right and she is actually taking values from 0-5.

[@jeevanreddy9895]

6 is not considered there👍🏻

[@csosclracconlpro8701]

sorry can you explain, why NAND-Gate is needed?

[@E4E]

If we reset at 6 C=1 and B=1 yet A=0. The NAND function is required as these particular devices have active-low set and reset pins (Logic zero makes them happen). If the set and reset pins were active-high, we would use an AND gate :)

[@rohanmadhav3017]

Thankyou

[@kankanabhowmik4573]

Mod 6 asynchronous or make a 6bit asynchronous is same or not?

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[@kuldeepkargeti1916]

Not same

[@thandalasaithilak1481]

Evaru cheppina artham kale honey voice tho sweet ga cheppav

[@fathimathshazia679]

❤

[@adarshsharma007]

C ko pehle kyun likha

[@jayrajsinhjadeja7555]

(2^n)-1 n=3 Maximum count is 6 How?????????

[@priyanshusaxena7157]

6 is 110, and the count for 3 bit can go upto 111, hence n=3

[@Eazy_learn]

worst explanation

[@faisalpeer973]

Totally wrong

[@r.b.4386]

It's correct explanation. If you're not interested then you need not to watch it but you should not leave a negative comment like this

[@yehualashetbelayneh5528]

xza

[@ShriramIrabatti]

Wrong one

[@-shoya-ishida-]

thank you very much ma'am