Ring Oscillator Design & Serpentine Routing (Part-2)

[@ozangulec4064]

Very nice!!

[@analoglayout]

Thx

[@learn.sth.useful]

Thanks for making the video. One thing is that the output load (say an inverter) needs to be connected to the RO and related RC peracetic needs to be considered. It would be great if this part can be covered in future videos.

[@analoglayout]

Thanks for the info!

[@user-wl1fz4rk4h]

Nice explanation & valueable information.serpentine structure is not a good idea.resns takes more area, irregular structure, more voltage drop, ineffective current flow around the corners (ofcourse not a pblm for stdcells). Best solution is using in1 & in2 with lower metals & in3 routing with higher metals. By adjusting length & widths we can achieve equal parasitics for all 3 nets & the same thing u can observe in extraction also.

[@analoglayout]

Ys we can try this in some method, but I wanted to explain about serpentine connection so used this method

[@user-wl1fz4rk4h]

@@analoglayout 👍

[@srujanagangireddy1386]

Nice explanation, thanks sir

[@sharathseshadri3634]

I think no one will use serpentine routing in lower tech nodes , if there are 5 stages then how there serpentine can be done ? more the stages more the routing between them , can you please explain this ?

[@analoglayout]

Even if 100 stages are available in ring oscillator since we have to maintain equal RC, we have no option other then serpentine connection, this is regardless of any technology. You can suggest me if any option are available to achieve equal RC in the above case

[@sharathseshadri3634]

@@analoglayout 1 .100 is a even number , the problem is with odd number of stages 2. Lower tech nodes like 7nm and 3nm does allow bending in metals , so we cannot use serpentine routing 3 . Spacing apart the blocks will increase the parasitic cap and we may get other issues , we may get latch up issues , ose etc.. The main motto here is to reduce routing resistance between the stages , I feel stacking of metals from last stage to 1st stage to reduce the resistance , clarify me on this

[@lucascaspaulzero8606]

Very nice! I just worry that at high frequency, such routine can cause extra resistive loss, due to crowding effect. Also, doesn’t it work like an antenna and cause radiation?

[@analoglayout]

1.this ring osc will not create High Fq, if at all high frequency we should not use this method, 2.its a small routing so it will not create too much resistance across the metal routing. 3.yes of course there are possible of antenna, if at all there is antenna we need to resolve.

[@suresh1334]

sir, can you please upload the remaining videos of the short channel effects(bulk punch through, surface scattering, velocity saturation, impact ionization, hot electron) as I could not find a proper explanation regarding this effects

[@svnprakash5734]

Sir please explain about abutment in layout

[@kesavarao1662]

How to run parasitic extraction