Signal Integrity Issues in VLSI | Crosstalk, Glitch | How to avoid these issues?

[@bindhur5277]

Really good explanations. If possible, could you please explain the metal layer fundamentals and routing challenges and best practices.

[@jairamgouda]

I will try to do it asap. Thanks for your support

[@rohanyadala9096]

Nicely explained 👌

[@huyvanba2943]

Which Glitch type need to be fix first, Undershoot/Overshoot or Rise/Fall ?

[@kishanb4229]

Very nice explanation , Keep doing more videos Thank you ... But is it good idea to shield clock nets ?

[@jairamgouda]

Hi Kishan, thanks for your support. Yes absolutely. Shielding of clock nets is extensively done in the industry.

[@abish83]

@@jairamgouda we use NDR for clock nets and also shield

[@zunaid4664]

Is there some separate team who carry out Signal integrity analysis ? or it is covered in STA only?

[@arunprabu7769]

SI analysis is a part of STA

[@abdalrhmanbadran138]

nice :)

[@divyamsatle6673]

bro can you please share the slides