SPI FPGA core for MCP3202 ADC in Verilog

[@damny0utoobe]

SPI, verilog, ADC. This tutorial is helpful because I was trying to figure this out for my project. Thanks I subbed you. Please make more videos like this.

[@Dom-bo8wd]

Thanks! Im working on an updated version that will release soon!

[@TheTwelveStars]

Useful,thx

[@AnonymousPage-e2d]

hi sir ,how did you consider 176??, and 124 for 1000ns ?? please show calculation??

[@dpvibes7717]

Hi Dom, can you tell me this maths which is used in programs

[@Dom-bo8wd]

Hi! I don't quite understand your question, most of the math is just algebra, does that help? If not feel free to ask more questions!

[@dpvibes7717]

From the system clk(fpga board) to sck....how did you do that....and then what time you took for a single bit receiving and how

[@muhammadkashif4000]

how do you calculate initialize and disable time + transmit time in testbench

[@muhammadkashif4000]

Ok I calculated the time 4880 hence thanks and not need your help. thanks