An introduction to FD-SOI

  Рет қаралды 99,644

STMicroelectronics

STMicroelectronics

Күн бұрын

Пікірлер: 27
@vadakkodan
@vadakkodan 7 жыл бұрын
Excellently explained! Made clarity on body biasing technique and current VLSI industry needs. Thanks for the Video ST Electronics!
@souvicksaha1753
@souvicksaha1753 8 жыл бұрын
Excellent illustration and explaining.
@sunilht1990
@sunilht1990 8 жыл бұрын
With less effort I come to understand a Very good concept
@muniswamy100
@muniswamy100 4 жыл бұрын
Thanks indeed for a wonderful illustration. Saved tons of reading effort.
@7th_dwarf542
@7th_dwarf542 10 жыл бұрын
Well done STM. It would be interesting to see how this implementation of the process compares to the tri-gate of the same technology node.
@centuriomacro9787
@centuriomacro9787 2 жыл бұрын
Thx, the visualization is very insightful.
@Torchl146
@Torchl146 2 жыл бұрын
Thx STM for this great video really intresting and very well explained for someone completly new to this technology
@olympuspamir5729
@olympuspamir5729 11 жыл бұрын
Thanks for this video. It helped me a lot to understand the FD-SOI. Thanks!
@SethavutDuangchan
@SethavutDuangchan 9 жыл бұрын
thank you for easy explanation that it's very good video.
@alexvour450
@alexvour450 9 жыл бұрын
one think i didn't understand in the video: how is the lithography reduced when using fd-soi? by what means? it appears as if you switch to fd-soi and automatically the lithography is reduced.
@rockon1781
@rockon1781 9 жыл бұрын
very appreciating video..loved it..
@jizanthapus176
@jizanthapus176 3 жыл бұрын
Thanks a lot!
@sunilht1990
@sunilht1990 8 жыл бұрын
But how the power dessipation can be reduced with different body and gate voltage? Can anybody Explain please :)
@prjthkmr
@prjthkmr 7 жыл бұрын
I think they are talking about increasing the Vth for devices by body biasing so that the subthreshold leakage can be reduced.
@anilkumarpattapu7984
@anilkumarpattapu7984 4 жыл бұрын
@@prjthkmr I think subtheshold current will not happen due to insulator below the channel that makes fully depleted... correct me I iam wrong
@kartikR11
@kartikR11 5 жыл бұрын
Going to help in my university exam. Thanks
@Sky94567
@Sky94567 4 жыл бұрын
very good video...
@JD-kf2ki
@JD-kf2ki 3 жыл бұрын
Isn't this a Swiss-French semiconductor company?
@ravi9diamond
@ravi9diamond 12 жыл бұрын
Awesome Video & Ultimate technology. Explanation is really simple. :) :)
@eduardorocha8460
@eduardorocha8460 6 жыл бұрын
bão dmais , obg memo
@textex2010
@textex2010 12 жыл бұрын
Greate vídeo
@বাঙালিরস্বপ্নেরক্যানভাস
@বাঙালিরস্বপ্নেরক্যানভাস 2 жыл бұрын
I have one question, how to mitigate the latch-up problem in SOI structure devices?
@gyzq
@gyzq 2 жыл бұрын
10 years later, you still can not deliver 14nm FD-SOI👿
@sebastianelytron8450
@sebastianelytron8450 7 жыл бұрын
Superb video, shits all over Intel's education vids
@frankgoh2865
@frankgoh2865 4 жыл бұрын
видео полезнен
@MooreOdelette-r3z
@MooreOdelette-r3z 4 ай бұрын
Toby Road
@jedipdx
@jedipdx Жыл бұрын
Google Pixel brought me here. 👽
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