SR Flip Flop Circuit With NAND and NOR Gates

This electronics video tutorial discusses the operation of the SR flip flop circuit which is composed of NAND and NOR gates. The output Q only changes with an active clock signal.
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[@mx3616]

I don't care if I'm not taking a circuit class. This man has helped me through so much. Not all hero's wear capes.

[@harmonyOfEureka]

The Organic Chemistry Tutor has to be one of the most influential forces in the academic world. He has helped so many with his videos. One of the best SR flip-flop explanation

[@faithful.m]

5 mins in and i understood a concept i spent hours trying to grasp,thank you💗

[@tiesetsomatsipa5402]

I love your work bro. I was a lil bit confused as to why the system always favored Q to be zero in the beginning like at time stamp @5:37, but then I remembered what Ben Eater once said on his videos that, they do this deliberately to always set Q prime high, meaning not active. They do this in hardware by adding buffer(s) at the R (reset) button to allow electricity to delay from that side, so that electricity from S (set) side could reach first and faster, to Nor gate, to flip Q' to 1, then that 1 will automatically continue to be added with R' and flip Q to 0, and continue in that cycle until, S (set) button is pressed. Very impressive how this actually is a brilliant idea.

[@angelicwolf909]

Old school Boolean logic. This was the basis for CPU's back in the day and "debounce circuits" where you connect a mechanical switch to a digital circuit. The delay propagation of the chip (or transistors) made sure you did not get fluxuation signals into the digital curcuit even if you used "make before break" mechanical switches. Cool.

[@jorgeariveraromero7635]

Thank you so much LOL I can barely understand my professor but this makes it SO MUCH clearer

[@Endgator]

Yesss more circuits!! Been studying electronics over the summer mostly due to your videos so more is always appreciated!

[@stgfrfrfffc3094]

this guy is carrying me from year one to graduation GOAT

[@atikshahrear8290]

I dont know who you are, but You are savior Man. I have deep respect for ya. One Request can you do a series of Discrete Mathematics? Like Pigeon Hole Theory, Graph Theory. Set Function Relation.

[@ameliaamezquita9100]

Is this person a genius? A master of all trades? What tutorial will they show us next? How to play guitar!?

[@zhuoyangzhang4821]

bro is a legend.

[@CatnamedMittens]

Sublime explanations.

[@bartimaeu1]

So a SR Flip Flop is just a SR Latch circuit but with the conditional clock ?

[@TenzinUden]

YOU ARE LEGENDARY!!

[@grahamamir8579]

Should I do this instead of using the excitation table and characteristic table?

[@kates-creates]

we appreciate you ! < 3

[@Abssi2001]

Thanks, Please complete all flips

[@ahmadjaradat3011]

thank you

[@giwamubarak3680]

Which app do you use to display this KZbin content sir 🤲

[@okaudi]

the title is with nand gate, can you tell me where is the nand gate example?

[@bartimaeu1]

It's in the SR latch basic introduction video. The NAND Gate is represented by the triangle with smol circle on its right side

[@Fadhi-Ku-Dirir]

🐐

[@flickwood6248]

What's the difference between "no change" and "memory"...?

[@lshaad2538]

it's the same thing

[@flickwood6248]

got it

[@StaticBlaster]

I suspect the title is a typographical error as well. It should say SR Flip Flop Circuit With AND and NOR Gates.

[@bartimaeu1]

The title is correct as NAND Gates are being used. Not AND

[@hunterzone4846]

@@bartimaeu1 Check again, he’s using AND gates for input with NOR latch. If he used NAND gates, he should use NAND latch.

[@mastershooter64]

is this what's in my computer's ram?

[@ishaqkhan36947]

This is very easy

[@4xiomatician]

Yayy

[@robertmartens7839]

You stopped saying 'setted' you have improved.

[@saki7952]

New Microphone!

[@octorgone4459]

First

[@ynakristianajoven2560]

IM EARLYY

[@EvTheFlickFan]

696 views

[@1mrnewton]

Who’s back here because of resit?😂😂😂

[@utilizator1701]

What is resit?