Verilog Interview Questions with Solution | #5 | VLSI POINT

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VLSI Point

VLSI Point

Күн бұрын

Пікірлер: 9
@digitaldvr8993
@digitaldvr8993 9 ай бұрын
V. Interesting your teaching is good and helpful
@vigneshs6317
@vigneshs6317 Жыл бұрын
Questions 6: we need to declare that out = 0 or 1 right? If you not declare it will set as x so invert of x is x right?
@zebra00024
@zebra00024 Жыл бұрын
Actually it's a good point
@rathinbiswas4805
@rathinbiswas4805 9 ай бұрын
Its freq/8 code , Right code --> always @(clk) ...not posedge clk -------> ( For divided by 4 )
@logeshgopi4212
@logeshgopi4212 3 ай бұрын
yes correct, if she is giving posedge, then she has to give [if (counter == 2'b01)]
@digitaldvr8993
@digitaldvr8993 9 ай бұрын
Mam can you make some coding topics like how to write code for beginners
@vigneshs6317
@vigneshs6317 Жыл бұрын
In question 7: multiple initial block as well as always block it's excute parallelly right?
@seelamnarendrareddy8982
@seelamnarendrareddy8982 Жыл бұрын
Yes, it is correct, but in video it was wrong, inside the initial block it will be executed in sequential
@chetu1991
@chetu1991 Жыл бұрын
All initial block are start executed in parallely and start in 0 simulation time. But in video it is wrong.
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