Why Setup Time & Hold Time Requirements of Latches or Flip-Flops?

[@ericsu5909]

Hi: You can have a negative setup time in a FF, if a FF has a long clock buffer you will have negative setup time. Reason we don't see any negative setup time is because this clock buffer is only one

[@ericsu5909]

sorry I mean usually in schematics there is at most like one clock buffer

[@circuitimage]

Hi Eric, thank you so much for providing this insight. I agree, but the more clock buffer, the more timing uncertainty is, which may be even very difficult to analyze. So, I don't think we need to risk the negative setup time by lots of clock buffer chains. :)

[@circuitimage]

@@ericsu5909 Yeah, I see and make sense, which depends on how you designed it. If we only look at flops without buffer, then that could be more obvious. :)