How to Reduce Parasitic Capacitance in Your PCB Layout

[@Mahesh-uy8jw]

Thank you so much Zach for all the content. I have been watching your content for past 6months and I just got a good job opportunity at Capgemini as High speed HW designer. Your content enriched my knowledged and improved my skills.🙏

[@AltiumAcademy]

That is awesome!

[@Tronixlabs]

These videos are quite interesting, and add a lot of value to the world of PCB design. Thank you.

[@AltiumAcademy]

Glad you think so!

[@jhonzumaeta]

Thank you so much! I appreciate these types of videos.

[@AltiumAcademy]

You are so welcome!

[@2mcolours]

Pls one video on single layer pcb design through hole components without schematic dia.

[@Zachariah-Peterson]

Are you asking how to create a design without using schematics? That is not the proper way to create circuit boards, you have to create schematics as this is what defines all the net connections in the PCB layout.

[@2mcolours]

@@Zachariah-Peterson thanks for feedback. Ok 1 video making single layer design through hole and some smd parts. Please request 🙏❤️

[@user-ty2uz4gb7v]

So is it accurate to say that in theory, all traces should be as far away from each other as possible?

[@Zachariah-Peterson]

Maybe a better way to say it is, in theory, trace spacing to ground distance ratio should be as large as possible as this is the best way to reduce crosstalk and mutual capacitance when dealing with digital signals.

[@deangreenhough3479]

Great video. Learned a few things and look forward to how you apply it in Altium along with some real world examples 😁🏴󠁧󠁢󠁥󠁮󠁧󠁿

[@AltiumAcademy]

Coming soon!

[@JawwadHafeez]

Pcb manufacturers offer differnt stackup layer thicknesses for multilayer boards. Eg in some prepeg between top layer and next layer is 3.8 mils and 8 mils ... Plz describe such qs in a future lecture ... appreciate

[@Zachariah-Peterson]

We have not looked at this specifically but I have shown through calculation some ways that the layer thickness (distance to ground) affects parasitic capacitance between two elements. I do this in the linked blog titled "Parasitic Extraction with an Electromagnetic Solver in PCB Routing" and I've done it more recently in a video on crosstalk.

[@amoldeshpande9826]

Very knowledgeable..

[@AltiumAcademy]

So nice of you

[@Bob-tu9jq]

you dha man, Zack!!!

[@gillsejusbates6938]

whyq do you look so small on camera? cant get this out of my head

[@Zachariah-Peterson]

static.wikia.nocookie.net/memepediadankmemes/images/c/cc/Wat8.jpg

[@lovutube1231]

Get new pens---the ones u have, have run out of ink.

[@Zachariah-Peterson]

Don't worry, we do pen checks on every video