Lecture 27 (CHE 323) Device Isolation

[@郭婷瑜-c5n]

I like this video b/c you explain every single detail with their purposes. Really appreciate! Already subscribed.

[@billlucas4332]

No mention.of "dielectric isolation" using anisotropic etching of V grooves, followed by 600 microns of Polly. Flip the wafer over and grind/polish back to achieve isolation.

[@yao_10_18]

thank you for making this video!

[@brandonsamuelcruzsilva7626]

Thank you!

[@ChrisMack]

PDF copies of all the slides in this course are available at: www.lithoguru.com/scientist/CHE323/course.html

[@rajgandhi4042]

Why their is p+ near n+ IN NMOS and n+ near p+ IN pmos transistor?

[@Spikiera]

contact for the p-substrate & nwell

[@sanketdamane2642]

Thank you Sir :) It was very helpful.