CORE & I/O (Voltage Island & Freq Island)

[@rajathmvenugopal8313]

14 minutes of this video is equivalent to reading pages together of reference material, Thanks again sir!!

[@yogawithvijay8472]

Hi Jay, i miss you as my manager because of bpt... other wise i will be in a good shape under your guidelines, will try to meet you in the future projects... (This is my recognition after seeing all your videos)

[@analoglayoutdesign2342]

Thanks Vijay for feedback.. Analog is small world.. we may cross again in future..

[@chaitanyagorla4004]

Please do make videos on matching techniques as well! - Big fan ❤️

[@analoglayoutdesign2342]

Sure...thanks

[@srikanthSrikanth-to7jh]

Hello sir ,Waiting for matching Techniques sir please post a video for us, and also post a video of all the important concepts in analog layouts please sir thanks for your knowledge.

[@mdtariqueali1262]

Excellent

[@user-yn4gz9tx1c]

Thank u sir

[@tomurkin5563]

Can you talk/give references to layout examples of voltage islands? Even for the simple case of digital and analog domains - how is the separation really realized on the IC. Thanks, great video!

[@analoglayoutdesign2342]

Thanks for the feedback. Please check my video on AGND, DGND & Isolation. It will help I guess.

[@jaybhushan161]

So it’s like separate devices which needs 3.3v n 1.8v but in a channel we have all the devices together so won’t this 3.3v trigger a noise and affect the 1.8v device ?? To protect this from happening what are we supposed to do ?? In layout just a guard ring around the device is sufficient ??

[@analoglayoutdesign2342]

In layout isolation is done by deep n well or n+ or P+ guard ring

[@mohammedafzal534]

Hai can you tell me what is the meaning of hand shaking in frequency domain?

[@analoglayoutdesign2342]

I think it should be signals crossing from one clock domain to another...so they use synchronizers for that....beyond this I have to seek help from others

[@askarali920]

why do use consider capacitor as load? usually it can be 50 ohms for matching. kindly clarify

[@analoglayoutdesign2342]

Now a days the load is capacitive in nature. Ur right earlier they were keeping 50ohm at every stage; for ex rx. But now only antenna is 50ohm. Rest all blocks are locally impedance matched. Hope this answers

[@saurabhdhiman718]

Why the core voltage is less than I/O voltage ? Can't it be same ?

[@analoglayoutdesign2342]

Core voltage will always be lesser than I/O. Bcos, power consumption is always proportional to square of supply voltage. There is big saving in power. For noise margin reasons the I/O is at higher voltage

[@meghachandargi6805]

Thank u sir