How Flip Flops Work - The Learning Circuit

[@LeonardChurch33]

Thank you for explaining in 9 minutes what it took my computer engineering professor a week and a half of barely comprehensible lectures to explain.

[@marcosyamgarcia6684]

I believe that's how it should be as I am in the same situation.

[@nintendoblood4835]

To be honest I watched this 5 times at half speed

[@melvindoo30]

So it's not just me then.

[@maskagopnik152]

i feel like they are there to get paid to confuse you

[@ibukunokunoye4795]

Lol same here

[@elephant35e]

Very useful video to watch when your professor hasn't been teaching that well during online school during the Quarantine.

[@josephmartinez5770]

Litterally y im here glad im not the only one lol

[@nightnightyasmin]

This is why I'm here!

[@rosspaterson7467]

same

[@MrNaufan]

can relate

[@brokenandcraked]

I'm in class and my professor refuses to teach lessons. He just shrugs and tells you to read the text book and figure it out. No one else is asking for help

[@blackxprophet3494]

In case anybody got confused like me, for active high SR Latches, the S is on the BOTTOM with Q-Bar and R is on TOP with Q. This way the S sets Q to 1 when it's high and R sets Q to 0 when its high

[@babadmanz]

what does active high means?

[@dynamic_pointer_cast]

Thanks, I was thinking that it should be NAND gates.

[@thevoidzzz]

​@@babadmanz It basically means that a device's output will change to high when the input to the device changes to high, active low is when the output of the device changes to high when the input changes to low

[@dbf72829]

@@thevoidzzz thanks

[@dbf72829]

Thanks

[@eelcohaven6699]

I think you got the set and the reset of the sr flip flop with the 2 nor gates reversed, in this case Q can only be high if set is low and reset is high

[@kylesmithiii6150]

I think the same.

[@dule78101]

It's ok for the sake of explaining.

[@banderfargoyl]

Yeah. It's confusing as hell.

[@mohamedb737]

I spent an hour trying to figure it out.... why did she reverse them???? I lost precious time

[@mumblic]

@@dule78101 For the sake of understanding, it's the most essential things. I have the feeling that for most people "understanding" is not really the reason why they watch this or other YT videos

[@diegoochoa572]

Why oh god WHY couldnt I find this video when you guys posted it and we were covering ff's. I looked through so many videos and so many read throughs that all seemed incomplete and made me more confused. Finally after blood sweat and tears I feel like a completely understand these but why couldn't I find this video when I needed it ;-;. Pls keep it up, your guy's videos are so incredibly helpful. Sadly better than my expensive textbook...

[@manukadilum6814]

blood sweat and tears dude stope being overly dramatic smh

[@RaffieFaffie]

@@manukadilum6814smh my head my head

[@mikeduino4596]

Obviously she didn't actually check the logic in her diagram, the set and reset inputs are reversed. Also, you would pull them down with resistors, not attach directly to ground.

[@nigelwang2447]

Thank you, I was going around in circles trying to figure that out.

[@Amittai_Aviram]

Thank you! I was wondering about the ground connection, too - that made no sense.

[@phildodd9942]

This series is great because you're using visuals to such great effect ! So easy to see what you're explaining, because up until recent times, we had to memorise what was illustrated in voluminous text books ! And you're explaining it so clearly to us ! This series is so useful because we can bookmark it and return as often as we need to for a refresher ! An Arduino makes things too easy; in a way it is a sledge-hammer to crack a nut, whereas we can ( and did ) use a flip flop to do the same job much more simply. As I said in another comment. this was the way that computers were built - they lived in air-conditioned rooms the size of Walmart, with hundreds of flip-flop boards each using 3 transistors. Because computers can't stop if they're multi-programming, the data has to keep cycling round until it is needed, which it did in these rings of flip flops ! Things began to change in the mid 1970s, when integrated circuits took over from discrete transistors for flip flops, and the shrinkage in hardware size began to take off. IT's great that you're covering all of this in this series - thanks !

[@DiffEQ]

Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@cortlandtatt6750]

This is my first time hearing this. It's just to fast, but I like how you explain . Thank you.

[@richardgray8593]

Since you are watching a video that can be paused, replayed, and watched at 0.5X or 0.75X, there is no such thing as "too fast."

[@Smiley957]

I played it at 1.75x 😂

[@ta1708]

@@Smiley957 well, then you have already understood it, most people watching this are learning it for the first time. You're not special kid...

[@Smiley957]

@@ta1708 I’m learning this for the first time too, don’t know what you are talking about

[@cedrichelsemans34]

@@ta1708 the kid in this comment makes the punch brutal 😳

[@peterpade6293]

Great stuff for my added learning for an old retired Aussie mechanical engineer

[@Stelios.Posantzis]

nope - it's got errors

[@RaffieFaffie]

@@Stelios.PosantzisWhat are the errors?

[@Stelios.Posantzis]

​@@RaffieFaffieMost sources usually have ¬Q as the output of the NOR gate which has S as its input and Q as the output of the NOR gate which has R as its input. She's got it the other way around but she still continues the description of the circuit as if the inputs and outputs are named in the usual way (if you swap the outputs together with their values, they go back to being correct). Hence the values are all wrong. E.g. at 3:07, with S = 1 then Q must be 0 Same error at 4:44 with S = 1. again Q must be 0 in the circuit on the left (the one called "Active High").

[@chrishadjipetris6059]

Jk flip flops are usually used for counters, either synchronous or asynchronous and D flip flops are usually used for fsm implementation. Also, if you connect j and k together, then it becomes a T flip flop

[@jlamothe2]

I think you've got Q and Q bar reversed on your SR flip-flop. Looking at the top NOR gate, if either of its inputs is high, the output will be low, meaning that if SET goes high, Q will go low. Edit: it turns out the more common way is to switch RESET and SET, but the end result is the same.

[@syedsaqlainahmad637]

i feel the same bro

[@DiffEQ]

Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@Gliese667cc60]

Your teaching is easy to understand... Thanks dear! Who is speaking here, Marcos from Brazil!

[@tigermangoth6]

Very excellent video. Very helpful and meticulous. Just what I needed. God bless you all at the Learning Circuit!

[@DiffEQ]

The diagram for the NOR gate RS flip flop is incorrect. The SET input is on the NOR with Q-NOT output and the RESET is on the NOR with Q output. There is no way for Q to be HIGH ( 3:10) with either of the inputs to that NOR gate also being HIGH. This video has been out for nearly three years and no one has noticed this?

[@DotALotTroller]

yes im pretty sure this is incorrect, the Q and Q-NOT should switch places

[@mughatoamugha9029]

Mam thanks a lot for the wonderful amazing video. By the way I wanted to add some correction At 5:27 minute of your video there is an error of AND gate image. You have added the inverter sign on the diagram. Since there won't be any inverted or bubble sign on the AND gate. Thanks

[@StrsAmbrg]

Yes, picture of the table. It is NAND gate.

[@bigfootlives4546]

Also, for the active-high SR Flip Flop, the Set and Reset pins should be flipped (Reset on the top, Set on the bottom).

[@TizedesCsaba]

Hmm..., from 3:00 when said the inputs are connected to the Ground then discussed these inputs set to High is totally confusing. How something changed if that connected to the Ground? If something connected to the Ground that signal is always Low or I missed something? English is not my native, so maybe this is the root of the problem...

[@Jose_T131]

One of the best examples with animations. Not to bashed hindi content but this is more undertandable

[@reasonablebeing5392]

Awesome tutorial. Some of your diagrams have inaccuracies but it is very obvious and does not detract from the verbal explanations. Would love to see a follow up episode with practical applications of flip flops. Counters coming up next?

[@DiffEQ]

You say it's "awesome" but that it contains inaccuracies. So, which is it? Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@VisionForDynamics]

It's so annoying that it's taken me this long to finally find someone who can teach this in the most understandable and simplest way possible. Thank you so much

[@michaelllewellyn7215]

At last after all these years 30 years and counting I now understand how J K flip flops work and what they are used for thanks

[@jamesvitello8020]

Very nice instruction but I am confused. How is it possible that the flip flop examples (time 2:42) show both gates with set and reset inputs connected together denoted as ground, and that independently each input is said to be at different states, either high while the other is low or vise a versa?

[@DiffEQ]

This is an undefined state and the example should not be shown this way. It's confusing. It's also incorrect. If you were to power up the flip-flop with both inputs tied low, then it's simply a race condition as shown and you do not know if Q or Q-NOT will be HIGH. Circuitry in modern flip-flops can be implemented to prevent this unknow initialization state, but typically a master SET or RESET is generated because the STATE of system must be DETERMINISTIC and the only occurs if the STATE is predictable. The example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@nara49veera12]

When both Set and reset are tied to ground as shown in the picture how can Set or Reset go high?.

[@QuantumVerse25]

Through active flip-flop gate we can make a divce which can do two different works at a particular signal.

[@cmprodutions]

I am condused. At 2:37 you say that NOR gates are only 1 if both inputs are 0. But then at 3:06 you say that setting the input to the SR flip flop causes the top NOR gate (input now 1,0) to have an output of 1.

[@andyjohnson4485]

Just getting into electronics so bear with me here! Could you possibly include an everyday use of where these IC's are used, example, a flip flop could be used to toggle a chess clock, then give a quick dirty circuit that can be made at home? I ask this because I can watch videos all day long on what IC's are but I have no idea where to use then or how you would set up a circuit to create inputs for them. Any help in unlocking this magical box of mystery will be most appreciated!

[@jancenj2218]

I have to agree with you on this. People should be shown the application first.

[@KermitCyrus]

SSDs and RAM use flip flops to store data. At 0:45 Karen states that flip flops and latches are sequential logic devices with built-in memory; combination logic devices don't have memory capabilities.

[@rogerbarton497]

At 3:39 you show reset high and set low when they are both connected together and to ground. You can't have two levels on the same wire at the same time, and in the case of TTL at least 0v wins.

[@syasyaputri148]

Thank you for this video! It helps my revision a lot. I have a questions for the SR Flip-Flop (Active Low). When drawing, do we need to connect SET' and RESET' to ground?

[@skinnythanos6875]

no, then the flip flop will be turned on, since in active low, gnd turns on the flip flop

[@tanveerahmad8455]

best video found ever about electronics

[@user-ev6cq4qf9j]

This is very helpful since im just nine years old and im getting into circuitry in simulations

[@rezaghasemzadeh9440]

very useful, thanks ❤

[@markfinn825]

Flip flops that use a few extra parts are so much easier to understand . An SR latch made of an OR Gate, AND Gate , Inverter combination is a good place to start.

[@hyjinki4886]

Thank you for making sense of this so I can retake my Digital Logic final

[@aaronaustrie]

Great explanation Miss!! Love it ❤❤ I've just subbed to your channel

[@DiffEQ]

Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@jasons8479]

I wore flip flops to the beach once. The pins were like stepping on sandspurs but the chips enjoyed seeing their silicon ancestors.

[@bonafontciel]

man 20 years ago my stupid teachers made me suffer when this is clearly explained hre. Today I'm revisiting this from a different angle

[@mathfaqanswered6368]

I wish you had put a link to the other videos mentioned in the video. Having a hard time finding those.

[@polashdas6956]

Thank you. I am from Bangladesh.

[@kolinevans9127]

My other homework is to figure out what animal is on ur T-shirt, great video very helpful.

[@MrJonaotan]

It's a star and Toad from Mario

[@Hardeepsingh-re8xn]

Thanks for uploading this well explaining video. Very useful !!!!

[@anettesolano6049]

Thank you so much!

[@AxelmadQ]

u saved my life !! thank you thank you thank you !!

[@siphethonyambi441]

Well PRESET It Sets the output-Q and CLEAR resets the Q value. now what makes these special is the fact that they are asychronous to the clock input. if one of these inputs goes active it doesn't matter what are the inputs of J&K or even the clock input.

[@kenmurdock5128]

Solid video thanks !

[@Lil_Puppy]

Q-bar. Flip Flop, Q-Bert. Now you know the origin of that game. Congratulations.

[@darmayuda4157]

Can U show the detail electronic components citcuit inside SR flip flop to make more understanding it..thx so much

[@ObiWanBillKenobi]

In this one video here, at least in my opinion, we have the foundation of all RAM, all flash memory, and the reason that logic circuits had to shrink between ENIAC boards in 1945 and the creation of the home computer.

[@JakeSpeed1000]

If you hard wire set and reset to ground, how does it ever go High?

[@nirmalsankalana6479]

very clear explanation.... Thank you

[@DiffEQ]

Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@akashkakati2860]

How can Q be high if one or both inputs of the top NOR gate is high? Its Q' which should be high because when SET is high, both inputs to the bottom NOR gate is low and hence Q' becomes high at 1.

[@sanjav]

Finally I discovered a good karen

[@Tadesan]

I don't remember buying tickets to the gun show. Oh well, I'm not complaining ;)

[@jaypee9948]

Can you just merry me, you explaining this is like listening to Celine Deion singing the Titanic Song 😁

[@CrucialMuzic]

Next up: Tutorial on VHDL/Verilog :P

[@williamsterben]

Leapfrog.

[@BariumCobaltNitrog3n]

I found pre and clr on SN74HC74N used in a UV light, an alleged medical skin healing device. It would only stay on for 7 seconds and the On sw was a momentary on with led. So either the pre and clr made the momentary sw a latch or turned it off after 7 seconds. This is a positive edge triggered IC with 2 channels in its 14 pins, common vcc and ground. The device also had a two channel 555 chip. I just started taking things apart to see how they work to re-purpose them. I want to bypass the timer on this light with as little destruction/mod as possible.

[@ihsenlagha8725]

there is a mistake the SET and Reset are reversed !

[@alexanderkohler8270]

Can someone explain. When NOR logic sets the output to 1 for only both inputs =0. must set =0 and reset = 1 (to be reversed to input 0 to the upper gate)?

[@learninginstudentscafe7284]

Good work

[@jamiljawid6390]

Hello there, I am new in circuit world. My question: to have an output, you have to have two inputs. In flip flops, how it is possible to have output with just one input (I think so)? There are two gates each with two inputs. One input of each gate comes from the output of the other gate. I did not understand this. Thank you

[@alfredsivanzire3552]

Why was the letter "Q" chosen for the output?

[@Cordycep1]

All the IC chip spec will use Q to designate output.

[@mhmdsalhab8254]

You are a very talented and smart person

[@debojitacharjee]

Is it possible to make an LED on/off using a single push button switch and a flip-flop?

[@DiffEQ]

Yes. Latches are very fast so your button would need a debounce circuit, but that is precisely why these are called Flip-Flops... the output can change states on every arriving clock. Your button is the clock.

[@element14presents]

Derek has this overview of Flip Flops and how they work: kzbin.info/www/bejne/iWObgnmbbKqXhKs

[@vhm14u2c]

Thanks for sharing!

[@majorpygge-phartt2643]

Flip-flops are normally made using cmos technology which is STATIC SENSITIVE and therefore should NOT be handled without protective packaging while out of the circuit, or else the component can be destroyed by electrostatic charges which can be present in your fingers!

[@senatorpoopypants7182]

5:31 does that truth table seem off to anyone else, shouldn't the outputs at enable 1 be Qn, 0, 1, Invalid, respectively?

[@MrCardeso]

Thanks, Karen!

[@colliningraham8838]

When set goes high output q should go low because its a xnor gate. Set is true so q is false. So if q is false and reset isnt on then _ q should be true.

[@GhostSengra]

fastest subscribe I've clicked

[@oudomchem5133]

honestly, 6:50-7:15 ( it mean Q output always change when S, R, D occurred.. ?)

[@fergonzalez687]

Excellent , but I think the input signals S-R are inverred in the block diagram

[@DiffEQ]

You "think"? They are DEFINITELY reversed.

[@mohamedb737]

so I have a question: I think all kinds of flip flops have memory because the wiring typically implies an infinite loop (in software jargon) is that accurate? And at 3:10 why in an RS active high flip flop would setting S to high sets Q to high if for an NOR gate to return 1 both inputs should be set to 0. plz answer I need this info asap.

[@mumblic]

Because the schematics/diagram is wrong. The labels Q and Q' are placed at the wrong output pin !!

[@markfinn825]

Your pretty. Very pretty. But although I am a little worried of my being a little stubborn I encourage you to imagine Gates , Latches , and Flip Flops of every sort being made with only SPSD relays which shows everything involved in an easy to understand manner (unless you state what beneficial end the circuits shown have. Such as using fewer components by doing something like adding a circuit that resets all the RS flip flops at power up.) I hope I don't sound like I am being mean when my objective includes being helpful . By starting with the simple relay logic method everything can be seen with the eyes as switches in one of two positions depending on whether an electromagnet is on or off. From there following the rules for the type of ICs used will allow the circuits to be converted from one method to the other.

[@Mohammadirani-dz3yp]

Thank you

[@sebastianthomas8507]

Wow awesome tutorials

[@NuwamanyaPetr]

Excellent

[@shafiqalom8408]

Nice video... Tutorial 54-59 not found...

[@cheikh7036]

Problem solve ?! Not quite... what about the race around condition when clk = j = k = 1?

[@armandoborges8150]

Nice information TY

[@angadsinghchaudhary9466]

Please suggest me a best beginner digital electronics book please

[@bowzert]

She's speaking the language of gods

[@cliffordeng5016]

definitely

[@richgolfs]

Great videos you’ve got posted! Great reference for me because I haven’t studied the stuff in 40 years! JK flip-flop bad pun coming up LOL when I was in college the books we used for studying digital electronics was from HP they were very good also I used to use some books that I got one was from John D link logic designers guidelines I believe it was I don’t have the book anymore but there were a lot of good books. Also there are used to be a series of books from RadioShack written by forest Memes the third great reference material for anybody that’s interested. Assuming they still exist

[@DiffEQ]

Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@ravielramirez109]

Good day ...can you make a selection switch number....1 to 9..each number has it own botton.. and it has ah reset botton to...thank you ...notice me pls i wish you can make ...it a helpful for me thank you again in advance

[@bradmiller9507]

Thanks!

[@fati3m574]

Hi! I can't find the missing episodes (54-59)

[@element14presents]

They are on the element14 community - all TLC episodes can be found here: community.element14.com/challenges-projects/element14-presents/thelearningcircuit?ICID=e14-presents-navigation

[@blackred5155]

Thanks and helpful

[@amitassasson1893]

yeah trying to study for a final tm no one in the class even knows whats going on remotely and i finally have an idea

[@fahadkhamas398]

sis you have error on 3:13 minute. it should be when set is high q dash is latched to high and q is low " the opposite" i hope you check it by making simulation ( nor gate will give high only if both input is low) also the set and reset in opposite position

[@niranjanaprasad4293]

Thank youuuuu

[@Stelios.Posantzis]

4:44 Active-High circuit state is incorrect (set=1, reset=0, Q=1, ¬Q=0)

[@natalieromero9498]

I thought flip flops and latches are not the same, why are you able to use them interchangeably?

[@carolinaferreira7058]

Love you guys!! so amazing so amazing I'm struggling with digital eletronics at university. And I really want to learn it. But sometimes I feel lost cause I don't know how useful it is. I mean Why do I need a flip flop? How can it change lives? sometimes it's so theorical and I really need some basis. Even the lab it's really theorical. I mean How can I save a life with all this knoledge? This is my point. I really believe it's useful but I need someone to tell me about it.

[@Arvidje]

With a flipflop u can have multiple inputs or outputs on only 3 pins (data, clock, load) For example if u want to make buttonbox of 64 buttons, and your adruino has only 16 pins, u have to use shiftregisters (cascading flipflops) ... these chips are flipflops.. the data line will collect all your inputs and u program your adruino based on the load and clock to read them.. u need only 3 pins for that..

[@parshantjuneja4811]

She is pretty good!!!

[@vincentcausey8498]

I got lost when active-low was introduced. I can't understand how the circuits behave differently if they are identical, and all that has changed is putting a bar over the S and R.

[@DiffEQ]

They are not the same circuits. The first is built (incorrectly, by the way) with NOR gates and the second is built with NAND gates. Unfortunately, the example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@Smiley957]

OMG that Mario Galaxy t-shirt! I want one too!

[@jesusaguilar5708]

learning confuse , but getting there thks

[@paultinguely6329]

Yes, in the SR latch diagram, either the SET and RESET labels need to be reversed OR the Q and Q' need to be reversed.

[@markfinn825]

There must be some reason that involves a lot of understanding first or I can not really find a good reason not to use a different SR flipflop which uses one input of a two input OR gate input as the Set input . The OR gate output is connected to one input of a two input AND gate. The other input of the AND gate is connected to an inverter output. The inverter input is the Reset input. The output of the AND gate is connected to the other input of the OR gate and is also the Q output. There are no disallowed states and no inputs need to be assumed.

[@DiffEQ]

Yes, you need background to try and rethink why NOR gates are used. In essence, just about every combination logic gate is made up of NOR gates. Even inverters are just a NOR gate with both inputs tied together. NOR gates are easy to construct on the wafer. That said, the circuit you describe makes no sense as you do not show where the Q-NOT signal is derived. Nevertheless, what you have described is equivalent to the two NOR gate example: Take the inverted output of the first NOR gate and move it to be the inverted input of the other. You now have an OR gate, and another OR gate with in inverted input and inverted output. This is BOOLEAN equivalent to an AND gate with one inverted input. Yes, you need more background to understand this. It also doesn't help that the example shown here is INCORRECT. The example for the active-high RS is incorrect. Either the SET and RESET need to be swapped or the Q and Q-NOT need to be swapped. It is IMPERATIVE when making instructional videos to be accurate or it will just confuse the viewer. How does anyone , in the know, miss that the output of a NOR gate cannot be HIGH if either of the inputs is HIGH? (3:10)

[@markfinn825]

@@DiffEQ maybe I did not describe it clearly but I tried the circuit and it worked for both toggle and data flipflops that I can use and understand easily. So can anyone without needing any type of degree. At the very least it provides a easy answer that gets us there without many hours of study first. The drawbacks of cross coupled circuits can seem to make no sense to amatures. I will be using this circuit to construct a calculator I designed although I do not possess any type of degree

[@timgoppelsroeder121]

Why dont my teachers give enough of a fuck to explain this to me like this..... thank you

[@ifrazali3052]

How does SET high makes Q high??

[@FManVybzsta]

Thank you very much

[@e-earthdiscover382]

Wellfull and helpfull video