Finger & Multiplier Layout - English Version

[@vinodbm8436]

its a good information about multiplier and finger,,,,,,,now i got the exact concept....and tnq for for giving such information.

[@gireeshgouda3443]

Superb explanation. Thank you soo much. Now I got clear idea about fingers and multipliers.

[@DevangsinghSankhala]

Thank you! Someone finally explained it!

[@satishkumar-sf4ce]

Nice video sir.but a small mistake....gate length is not 400nm it is 60nm..... Thanks for ur videos..... Please make videos about skill code

[@analoglayout]

in which way your saying this is 400nm ???? i have pdk with 65nm and 60 nm tsmc ???

[@thiluong6678]

@@analoglayout the gate length should be .06um, not .4um. Gate length is measured from poly edge to poly edge. I think you're confusing gate length for gate width.

[@94D33M]

@@thiluong6678 yeah i also think the same

[@anandg8860]

short and clear.....loved it

[@aswincvenu3958]

Also, different PDKs will interpret fingers and multipliers differently. in might be one way in tsmcn65, another way in GF180.

[@sivasankaransc3384]

when you select the devices in layout it got highlighted in schematic, how to enable that option in cadence?

[@analoglayout]

Use virtuoso XL and schematic XL

[@theonlyJinXFirE]

@3:42 you say 400 micron but it is actually 0.4 micron or 400nm. Then you say @4:00 gate length is 0.4 micron which is wrong as well, because the gate length is 0.06 micron.

[@analoglayout]

thanks for this info

[@nitheeshgowda.c.rgowda8105]

Do we have any strict rule that interdigitization pattern is only used for current mirror and common centroid pattern for differential pair?if yes/no why?

[@analoglayout]

no rules , only pattern we have to follow

[@Free_Agent_007]

What is the short cut for parameters in sch. Can you please explain how to use tool bro.🙂

[@bhanuprakash3274]

May I know what is the difference between one transistor 400um with 2 fingers and two transfer 200nm multiplier......(in this case both are same or not???)..and how fingering used for IR and multiplier is for current can u elaborate......???

[@StayInBliss]

love it

[@varanasivenkatasaikarthiks2976]

Good video useful one. I like your channel

[@analoglayout]

thx for your support

[@aswincvenu3958]

Suppose I have set m=2 and cadence operating point table shows a gm = 100. Is this the gm of a single MOS or the two MOS combined?

[@leviwow7741]

Thanks

[@94D33M]

7:34 why did you say overall width of transistor remains same? in the two finger isn't transistor width 200nm for both transistors?

[@chakri254]

Sir i have a doubt please clarify anyone if device 'A' having 1600nm width four fingered device and device 'B' having 400nm width with multiplier 4 what is the difference between them when sharing of source and drains of multiplier device 'B' thanks in advance

[@nitheeshgowda.c.rgowda8105]

Tell me about matching pattern for current mirror and differential pair each having more than 10 multiplier?

[@analoglayout]

this Sunday , i will upload full layout for diff pair and current mirror