Ripple Up Counter

Ripple Up Counter
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Lecture By: Ms. Gowthami Swarna, Tutorials Point India Private Limited

[@TutorialsPoint_]

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[@yashasgs590]

Who else is watching this a day before your exams😂

[@Amvflix7]

Abhi 2 ghante bad exam h

[@shekharkourav7268]

Kal exam h

[@tejassonar5774]

☝️

[@zainabfatima717]

Few hours

[@alamprabhumore5585]

15 mins bad hain exam 10.30 baje

[@musicalband_]

My sem exam is Today Afternoon, Now i am watching This concept 😢😂😂

[@pravinnaga3524]

U deserve the global prize for making me to pass the university exam !! 🙏🏽🙏🏽🙏🏽🙌🏻🙌🏻

[@hanul4989]

pravin naga learning this in a university? I can how shitty your university is lmao

[@thehaseeb9136]

@@hanul4989 so what I am also learning this University's second year 3rd semester.

[@MetalSword106]

Good for you

[@prithwishs.1488]

I'm doing it in 2nd sem B.Sc

[@meanujpoonia]

@@thehaseeb9136 same bro

[@bitanpramanik6672]

Mam,, I think you have done a mistake..the output Q1 goes to the 2nd flipflop..Not the Q1 bar..because it is up counter..Am I right??please reply...

[@raghavendrasaicherukuri5832]

Yes!

[@janishaidha6401]

I am watching this before 1 hour of exam

[@someshshinde4992]

Please make a video on timing diagram for these counters

[@balladofbusterscruggs515]

We need to take screen shot the notes so please move aside saying time to take screenshots it would be helpfull to remeber from pictures

[@thamizharaasan4067]

Bro try here 13:28

[@johnselema6322]

madam thank you so much , i have been watching your tutorial both digital and control systems, they are very clear and educative, you the best from Kenya

[@manoharreddy4973]

47746cccv4555

[@sasiprabha8048]

Is she is from kenya

[@AnirudhRSharma]

Thanks a lot maam!

[@abhinavabhi4276]

I RESPECT U MAM U R GREAT KEEP GOING ON❤️

[@mohammadgaffor7036]

I think for 2 bit ripple up counter to second flipflop we get clk by Q1. Because it is up counter

[@gggamingmore675]

Both is same doesn't matter whether it is from q1 or q2

[@naveenbalaji2440]

Yep she made a mistake

[@Dedeepya9]

For up counter,If connected from q then clk should have bubble ie +- or q bar connected to clk ie -+ both valid I guess

[@pratikpatil4735]

madam please practical connection of n modulo counter performance please display on you tube I request you

[@Andhere-Ki-Aahat]

Mam I think that for up counter u should consider clock of 2nd flip flop from Qa and not Qa^- as it now become down counter.

[@MhdAjfer]

Well done....++

[@anandharikumar1384]

for positive edge trigger clock is taken from qa' . for negative edge trigger qa is taken as clock

[@rampillatejasumanth782]

For better experience watch it on 1.5X speed

[@rockygaming3663]

Are ripple and asynchronous counter same?

[@DreamTravellerOfWorld]

Mam app bht acha padhati ho Apse ye bolna tha aap sad kyu rhtu ho pls mam aap smile Kiya kro Or apki smile se hme v himmat milegi study m

[@shirishu.deshpande4790]

explain same for 3 bit ripple counter, because if i apply the logic what you are telling it will not work

[@arppitmadankar3135]

if you apply correct logic anything would work

[@tamilazhagana9123]

Yes bro

[@rekhasamrajyuthasajja5143]

Plz explain same for 3 bit also with both positive and negative edge trigger

[@AnupSPai]

Awesome 👍👍👍

[@rajagiribhargavi1034]

Mam. Can we give the op of Q1 to as clock ip to the next flipflop. If we give the op of complement of Q1 as clock ip then wt is the difference between this two can u say mam plz

[@satishreddytadi7296]

Nice explanation but you should connect Q1 as 2nd flip-flop clock pulse not (Q1)^ .Now it became a down counter

[@v.sainathgoud8821]

🤣🤣👍👍👍

[@shoryasharma8420]

Thanks man for teaching us in easy way

[@63omkarkancharlawar79]

mam I have doubt that you have thought the counters reverse. means up for down counter and down for up counter

[@shryashnigam5577]

Mam can you please give us some written notes about logic families

[@ramyasriadapa]

Can we take the output from Q1as a clock pulse for 2nd flipflop..?

[@walidzein1]

yes

[@pravinnaga3524]

The principle is for flip flop 1 u need external clock pulse , and for flip flop 2 it takes the output of flip flop 1 as clock pulse , This type of counter is known asynchronous counter !!

[@rajagiribhargavi1034]

Can we give the out put of Q1 as clock ip to the next flip flop and why should we give the complement of Q1 as ip to the next flipflop can u say the difference between this two?

[@bharathb9305]

Thanks a trillion

[@sajad4059]

الله يحفضج نقذتيني

[@ramurajulapati6417]

Mm negative edge triggered

[@7wonders33]

I can understand your concert in simply

[@shrabankumarroy4161]

mam its a 2bit ripple down counter you made a mistake

[@dikshitabhatt]

Thank you so muchh😭

[@MULTIPLEXER_ENCODER]

Thank You Mam !! Nice Explanation!!

[@moviesongs5934]

Who thought that is crypto ...ripple xrp😂😂

[@sivaranjaniduraisamy8766]

Total 4 counts right? Why it is showing 3?

[@greatwinmakaye6806]

Always hours away

[@henokjacob1029]

Thank you Ma'am

[@raghavendrasaicherukuri5832]

U made a mistake ....check it once....

[@apurvathakur1111]

This is positive triggered edge.

[@lakshaykapoor5683]

Thank you so much ma'am for such a helpful video 😊

[@sriram1987able]

thanks mam

[@marakeshg8112]

Thank you. I understand now. For the most part.

[@vijayramakrishnan6838]

ur teaching is simly marvellous

[@anishkoirala2237]

How easily you descibe it mam😁

[@Amit-sm9ig]

mam you teach well but mam please introduce your self

[@maheshreddyalumuru9973]

Why we will consider toogle condition for counters?

[@sowmy__]

If not use the toggle the second output will not come after the first output there is no change if not use the toggle flip flop

[@dayasagar7823]

From Madagascar thankbu

[@gopu6410]

Perfect thanks

[@world-mz8hm]

Tooto otto Tu tattatta ayamma.

[@thamizharaasan4067]

Thank you ma'am Great explanation

[@vuyobuswana1322]

Awesome lesson...

[@sakshideshmukh4078]

Thank you so much Mam for your valuable guidance !!! Will you please tell that is 2 bit ripple up counter called as Mod 4 async counter ? And why ?

[@sakshideshmukh4078]

@Aravind Badrinathan Thank You So much Sir !

[@gowrisankarsimhadri1383]

Please explain down counter in mod 12

[@only4music725]

Excellent !

[@tanushreekarmakar4895]

Thank You ma'm.

[@kranthikumargoud07]

❤️

[@manoharreddy4973]

40

[@shalinibardhan8466]

thankyou mam

[@AhamedKabeer-wn1jb]

Well explained....

[@EVERYTHING-my7hn]

Tq

[@RamaKrishna-jp5wc]

D AND SR FF POSSIBLE RIPPLE COUNTERS

[@Pgggg]

I don't think it is possible with them as they do not have a toggle condition.

[@sagaracharya4696]

May be the best....

[@VlogsByBrownnBunny]

What is LSB AND MSB

[@shruthijeevanandam3379]

Least significant bit and most significant bit

[@sasireddy2544]

@@shruthijeevanandam3379 suppose 4 bit counter are there ??howwe take msb and lsb

[@niyaznazu8697]

@@shruthijeevanandam3379 hi

[@raghavendrasaicherukuri5832]

@@sasireddy2544 left most flip flop output is always lsb and the right most flip flop output is msb

[@nikhilchourasiya4720]

Nice lecture

[@moeed4255]

You have the most brown-est accent.. its so disturbing

[@parasbaghele9177]

Mam can you teach in Hindi