MOD 7 Asynchronous Counter | Mod 7 ripple counter using JK flip flop | digital electronics

[@EasyCrafts4]

thanks ma'am. from nepal

[@TechnoTutorials2783]

Thanku dear

[@inumakikun053]

Thank you was lot of help for.my exam

[@TechnoTutorials2783]

Most welcome keep watching

[@safalnp]

what is the use of jk in this question?

[@akhilasalapati7842]

Mam can we draw using T flipflop same process using NAND gate

[@TechnoTutorials2783]

Yes

[@higurudematsu]

Can't we do MOD-7 asynchronous up counter in the same process of how we did MOD-7 synchronous up counter and just change the circuit diagram a little bit?

[@TechnoTutorials2783]

Please check kzbin.info/www/bejne/gnfCfZ-VequfZpI

[@nonstopcodingcodewithadity8238]

Hi mam plz tell this design a modulus 7 counter using synchronus clock

[@TechnoTutorials2783]

kzbin.info/www/bejne/rJe1kp-If9SJjck

[@jproy9290]

Mam JK flip flop ka truth table dena jaruri hain?

[@TechnoTutorials2783]

Nahi wo maine just explain kiya hai in designing of Asynchronous counter not required

[@akshayrana9885]

You are best mam

[@TechnoTutorials2783]

Thanks dear

[@kaviya7334]

Why we use nand gate

[@TechnoTutorials2783]

You can use any other gate as well which produce 0 at output when all inputs are 1 Generally we use universal gate NAND

[@abdxlive]

Thanks

[@abhinanthns2270]

Actually there is a mistake ,the nand gate must be connected to Q0 bar

[@TechnoTutorials2783]

Why

[@abhinanthns2270]

Sorry for inconvenience , its actually correct only mam Thanks for the video

[@sippujha8558]

Mam aap na k map ka help kyu nahi liya hai jk ka input ka liya

[@TechnoTutorials2783]

Asynchronous mai input of jk flip flop always connected with high logic or vcc

[@sippujha8558]

@@TechnoTutorials2783 Thanks mam