FIFO Depth Interview QA Part 3

[@ShailendraKumar-uk8bm]

1490th byte

[@TechnicalBytes]

👍

[@TechnicalBytes]

Can you share your calculation?

[@TechnicalBytes]

I am also going to explain it in my next video..

[@ShailendraKumar-uk8bm]

@@TechnicalBytes Let overflow byte (1024 + n) Bytes written = 1024 + n Bytes read = n Writing time < reading time (1024 + n)*25 < n*80 => n =466 Hence 1024 + 466 = 1490

[@TechnicalBytes]

@@ShailendraKumar-uk8bm great 👍

[@realitycheck....9704]

thank you sir

[@TechnicalBytes]

Most welcome

[@AbhishekSingh-up4rv]

Thank You

[@TechnicalBytes]

You're welcome

[@rahulgoyal7929]

Very nice 👍👍👍👍👍👍

[@TechnicalBytes]

Many many thanks

[@sanyamsaumay70]

Good sir

[@TechnicalBytes]

Thanks and welcome!!

[@bhagatsingh3431]

Nice video please share answer also sir

[@TechnicalBytes]

try to think .. dear !!

[@idontcare-tk1te]

I don;t understand what duty cycle means/implies with respect to read, write enables

[@TechnicalBytes]

duty cycle = Ton/(Ton+Toff) right? Duty cycle in percentage = Ton/(Ton+Toff) * 100 write enable duty cycle = 50%, it means Ton/(Ton+Toff) *100 = 50 Ton/(Ton+Toff) = 1/2 2xTon = Ton + Toff Ton = Toff which means Ton is equal to Toff i.e. for one clock cycle wr_en is high and for one clock cycle wr_en is low. In short duty cycle tells the ON time as per the percentage of total time. For read enable, duty cycle is 25% Now, without calculating you can tell that for one clock cycle read enable is high and for 3 clock cycles remains 0. Let me know if you need any further clarification.

[@idontcare-tk1te]

@@TechnicalBytes okay, I think I understand it now. The Toff period tells how many idle cycles are there between each read/write enables, right?

[@TechnicalBytes]

correct, now try to calculate its answer!!

[@preeti12121]

321st byte ???

[@TechnicalBytes]

how come? dear 321 is a wrong answer. I have a 1024 byte location FIFO .. So, it can easily absorb 1024 bytes .. correct answer will be more than 1024 bytes .. try to think .. I appreciate that you are trying.

[@preeti12121]

@@TechnicalBytes i m confused :\

[@TechnicalBytes]

@@preeti12121 I will give its answer in the next video

[@TechnicalBytes]

@@preeti12121 you can try the same question by consider write clock period 50ns and read clock cycle as 100ns

[@meenugarg1102]

Please do share answer sir

[@TechnicalBytes]

I share its answer in the next video !!

[@gauravkaushal7341]

@@TechnicalBytes when will the video come?

[@gauravkaushal7341]

@@TechnicalBytes when will the video come?

[@mihirshah5614]

1490

[@mihirshah5614]

If the fifo depth is 1024, it will go full after around 37.24 us of continuous operation(1024*10^-6/(40-12.5)) and at that time write side would be writing (37.24*10^-6/25*10^-9) i.e. 1490th data byte