FSM in One-Shot || Mealy, Moore, Overlapping, Non-Overlapping || Verilog + Testbench ||

[@anupammathur17]

Bohot badhiya samjhaya bhaiyya🔥

[@ajithmanisaialigati4931]

bravo....the best🤩

[@physicswallah6969]

really good video, explained the theory and also how to approach the question well.

[@dharmeshubnare8166]

Nice content... really informative 🙌🏻

[@gabbarjadhav2293]

Good Explaination HAre krishna tq prabhu

[@duelgodgaming5227]

brother ye vs code me setup kaise kiya verilog ko??

[@tejabollam4606]

Excellent. Tq.

[@harshalikapadnis603]

Only this video helps me

[@shubhamshaurya1281]

how we will do if starts with 0 , then their wiil we 2 S0

[@vlsipp]

you can name ideal state as s1. for example you want for sequence 0110 then 1st state or ideal state will be s1 -> s0 -> s01 -> s011 (mealy) and s1 -> s0 -> s01 -> s011 -> s0110 (moore).