HOLD ANALYSIS | STA - 5 | Static Timing Analysis | The Rising Edge

[@kaustubhagrawal6676]

the best explanation one can ever get on entire youtube... you are genius for sure

[@yeruvavanachinnapareddy07]

Better than any other lectures ,

[@MuhammadShahzad-dx5je]

Just finished the whole STA playlist. Really nice sir! Much appreciated. You have a very good voice and a nice way of explanation. Keep it up, sir. One day u are gonna famous for your amazing content. Thank you so much.

[@therisingedge]

Thanks Shahzad, means a lot!!

[@tomcat1184]

@@therisingedge ambatublow

[@soulshineorganization4656]

Dude thankyou so much, Your videos legit helped me a lot in clearing my online tests and all the interviews for Qualcomm. Keep going! This stuff deserves a million likes.

[@therisingedge]

Great to hear!!

[@shreeshkulkarni3657]

hey bro im going to apply for qualcomm next month can you give me tips

[@coldspine3697]

@@shreeshkulkarni3657 Did you get placed?

[@shivambhati3388]

Finally After such a long time ,,,Good job once again

[@therisingedge]

Thanks Mr. Bhati

[@dn2358]

Thanks man for all your work 👍

[@poojak9714]

Thank you for this series. It was the best explanation I have come across till date.

[@therisingedge]

Glad it was helpful!

[@SameerAnand-YearBTechElectrica]

bro uploaded just one playlist of 7 videos and forgot his password

[@vinayakmishra4510]

😂

[@okokicici]

Great work ❤ 8:13 I'll see you on next rising edge😅

[@adityaupadhyay6932]

Really helpful videos bro. Concepts are cleared, everything is perfect.

[@varunnagpal2258]

STA explained very clearly. Which software tool did you use to make such slides ?

[@sahanacr3012]

Really Great Content, helped me to understand STA easily ,Thank You

[@sandipgajera7453]

Much very good work 👍

[@sandipgajera7453]

Please cover multicycle path, critical path and min/max in/out delay concept.

[@therisingedge]

Many thanks

[@therisingedge]

Sure, will cover that.

[@karthikmg3325]

Beautifully explained watched once understood tq bro

[@manojharshavardhan2385]

Thanks Yash. Waiting for more content 👍

[@therisingedge]

Thanks Manoj, will be uploading soon!!

[@manojharshavardhan2385]

@@therisingedge yeah looking forward to learn more

[@aditiakannav4468]

Really good explanation

[@therisingedge]

Thanks Aditi, Will be uploading more videos soon

[@alokmishra9522]

Grt videos bro....can tell me from where can i practice ques so as to master this topic...thanks 🙏

[@muhammedshafy.k.m7741]

Thankyou so much... great work🔥

[@therisingedge]

Glad you like it!!

[@muhammedshafy.k.m7741]

Eagerly waiting for the next video

[@ketch_10]

can you explain hold analysis for register to output timing path, using output delay

[@arghyakarmakar8422]

great Sir. Thank you

[@martelmegalaa6965]

Heyy, Thanks a lot for this high qualitty videos but I am wondering why we are not comsidering Tc2q in required time calculation

[@rashipandey4801]

i think that is because we are considering data in capture path at D pin itself

[@swetathanu8253]

Thank you!!!

[@dodgetesla3695]

nice explaination...But could u plz tell me what is the relation bretween Hold & frequency?

[@dipenjivani2619]

There is nothing in relation between clock frequency and hold violation as for hold violation we are interested for same clock edge and not for next clock edge so nothing to be done on clock duty cycle or frequency.

[@kartikmahavar1845]

Which books should I refer for STA Questions & Concepts?

[@therisingedge]

Hi Kartik, Thanks for your query but I don't follow any particular book(and not even a single one for STA), so can't really recommend for this topic. I just go with a topic, find whatever I can from wherever possible until everything makes sense.

[@aishwaryavpkadam]

Please make a video on Critical race conditions for asynchronous sequential circuit

[@therisingedge]

Sure Aishwarya, will try to do that👍

[@aishwaryavpkadam]

@@therisingedge thank you!

[@whiteroommenace]

Just to add upon , the statement hold is independent of frequency is not completely true. Half cycle paths are one such examples where both frequency and duty cycle affect hold timing similar to setup.

[@tomcat1184]

ambatukam, ambasing

[@sanyamjain8225]

Are these 5 videos enough for basic knowledge of STA for interview point of view for Btech fresher?

[@therisingedge]

Yeah, these pretty much cover most of the things, if we keep in mind all these concepts, we can solve the interview problems. I'll be uploading some interview problems soon to understand how these concepts can be used to solve some tricky problems as well.

[@sanyamjain8225]

@@therisingedge Thank you so much brother

[@welcometosevenworld]

Why don't you upload more video u teach well