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STA lec39 Latch Time Borrow | Static Timing Analysis tutorial | VLSI

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VLSI Academy

VLSI Academy

Күн бұрын

#vlsi #academy #sta #setup #hold #VLSI #latch #semiconductor #vlsidesign #AOCV #OCV #POCV
This is a video on latch time borrow concept by ‪@VLSIAcademyhub‬
Quiz Link: forms.gle/ZHjv...
Please watch video and attempt the quiz given in link above.
Let us know your feedback in comments section.
Previous video link (STA numerical questions part-3) :
• sta lec 38 Numerical Q...
STA interview questions part-2
• sta lec37 interview qu...
Other important videos
STA OCV concepts (previous video link)
• sta lec35 OCV concepts...
Setup concepts video link:
• STA lec8 setup time co...
Hold concepts video link:
• STA lec10 hold time co...
below is the playlist link to watch full series of lectures on static timing analysis
• STA Bootcamp: Static T...

Пікірлер: 9
@AayushiiGoswami
@AayushiiGoswami 5 ай бұрын
Finally understood it :)
@upendras6246
@upendras6246 2 жыл бұрын
Why do you need add latch in the first place, as 525ps+400ps < 1ns?
@pavanambala9594
@pavanambala9594 2 жыл бұрын
same doubt
@neerajmishra-do6zq
@neerajmishra-do6zq Жыл бұрын
Nice Q
@ayushgemini
@ayushgemini Жыл бұрын
Yes I am also having same doubt
@travelfreakphani5933
@travelfreakphani5933 Ай бұрын
Latch is inserted to fix hold time. If the two flops are positive edge triggered, then we use a negative level latch. It's a beautiful concept, go through it
@dhonig3061
@dhonig3061 2 жыл бұрын
Please make a video on latch to flip-flop path analysis same like this video
@nikhilpottabathini295
@nikhilpottabathini295 Жыл бұрын
if the next stage delay is 500ps then will there be violation of slack ? if there how to optimize sir?
@anjalianand9359
@anjalianand9359 Жыл бұрын
No sound
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