CURRENT MIRROR ( PART - 1)

[@sigangsabaglari3606]

Excellent explanation sir. Thank you.

[@ayyappann6860]

Awesome explanation sir....best i have seen

[@Sourav_Soumyajit]

Very nice explanation.

[@surajraj-kv4wj]

part 1 current mirror was very useful and i am waiting for part 2 current mirror

[@sreedevigiri723]

Exceellent explanation sir. Thank you

[@analoglayoutdesign2342]

You are welcome

[@tranhuuthong07]

Great lecture, thank you so much Sir. Waiting for the next great lecture !

[@analoglayoutdesign2342]

Thanks for the feedback

[@VidhateAshok]

Very informative..

[@analoglayoutdesign2342]

Thanks for the feedback

[@abhaygoyal3150]

great lecture

[@analoglayoutdesign2342]

Thanks got the feedback

[@alvarezju1]

Great explanation. Hope to someday see you add to your channel. There is a surprisingly low amount of online resources on these topics. Thank you for your contribution

[@analoglayoutdesign2342]

Thanks for the feedback

[@ivkreddy8]

Superb

[@erfanali5888]

That was very helpful! waiting for part2 eagerly

[@analoglayoutdesign2342]

Sure...part 2 will be more on layout related stuff

[@sohansoharab1670]

@@analoglayoutdesign2342 where is part 2

[@vivekvarri]

@@analoglayoutdesign2342 please upload part 2

[@AnilKumar-hl7oq]

sir please upload the part-2 of this current mirror we have awaiting from long time

[@analoglayoutdesign2342]

Ok

[@learner0000]

There is a load here ummm circuitry here 😂😂, I like the way you trying make it more simpler and simpler, this is what we need from lecturers before using a technical term, lecturers need to make the students understand what it's meant for

[@durgasubrahmanyam2138]

sir please upload part-2 for matching techniques

[@timegogo4182]

Dearest Sir, we are still waiting for part 2 🙏🙏🙏thank you very much

[@analoglayoutdesign2342]

Will try to get some time. Sorry for the delay

[@kesavarao5400]

@@analoglayoutdesign2342 quickly do it sir

[@timegogo4182]

Dearest Sir, we are still waiting for part 2… no matter how long it takes. Thank you very much ❤

[@manjunathgouda7506]

sir can you please make a video on self biased cascode current mirror and its importance in design?

[@arnabsaha7816]

Thank you

[@3RiversSQ]

Sir, Can you please make the 2nd part also.

[@analoglayoutdesign2342]

Yes will do

[@sushantsharma180]

sir please upload video on diff pair also with proper explaination

[@analoglayoutdesign2342]

yes very soon I will upload diff pair

[@yashgupta5871]

Please upload the second part too.

[@Army.indo7]

Sir can you do video on differential pair

[@analoglayoutdesign2342]

Yes.. will do.. even I have plan..

[@RanaAshraf-di8pe]

I have a question, in my graduation project we are asked to put current mirror load to test load variations across corners, how to put this current mirror at Vout of a switched cap circuit to test load variations?

[@analoglayoutdesign2342]

I haven't come across such a situation.. need to check

[@ayyappann6860]

when will be part2

[@harshakanamarlapudi1681]

Hi , Can you please upload a video about second order effects..

[@analoglayoutdesign2342]

sure...

[@harshakanamarlapudi1681]

Were we use programmable current mirror ?

[@analoglayoutdesign2342]

we will use current dac.. there we will use...sometimes in some corners, the gain of amplifier may reduce/increase...in order to get back the desired condition, we will use it. there are many places where we use it. the current will be controlled by digital bits like 4bit control or 6bit control etc.

[@surajraj-kv4wj]

sir can please upload part 2 current mirror

[@analoglayoutdesign2342]

little time reqd

[@211SANDEEP211]

Thanks

[@analoglayoutdesign2342]

Will upload matching in few days... that way current mirrors would be complete

[@rohanjakkannavar]

Is part 2 available?

[@gandikotaguruprasad3402]

Current mirror part 2 not available please upload it..

[@analoglayoutdesign2342]

ya..will upload...need time...

[@vimakuma]

Hi sir. @20:51 can not we just short 1v nodes of both cascode mirrors? Ultimately they will become same when we just connect them.

[@analoglayoutdesign2342]

Please go thru.. we can’t do it that way

[@aishikdas]

Sir stick to one explanation that due to Vgs current is drawn.In cascode you explained that I is drawn and that sets the vgs .People might get confused.I believe you understand that in electronics and Electrical its the I which is dependent not the V.

[@analoglayoutdesign2342]

No...that's the point... Bottom transistor vgs sets the current... So cascode transistor vgs cannot again set the current... Please go thru again...it's a important concept...not easy to comprehend... Hope its clear

[@aishikdas]

@@analoglayoutdesign2342 I think you said that due to the 1ma current the vgs is set to 1 vgs in the bottom diode connected MoS

[@analoglayoutdesign2342]

Bottom transistor vgs is set by current reference and diode connected device..anyways.. I think the concept is clear

[@vimakuma]

Could you please explain PLL sometime??

[@analoglayoutdesign2342]

Ok will try with introduction video

[@Arashmidos2012]

karrent meereeerz ??????

[@kandrashilpasree114]

Sir please upload part2 asap..

[@analoglayoutdesign2342]

Sure will do... mainly matching concepts

[@kandrashilpasree114]

@@analoglayoutdesign2342 yeah thank you sir

[@hemantpise3414]

where its 2 part

[@analoglayoutdesign2342]

yet to be recorded

[@analoglayoutdesign2342]

will do shortly

[@hemantpise3414]

I like u r video n the way explanation keep it up n go ahead

[@fedaghaboun1633]

حس

[@analoglayoutdesign2342]

Meaning?

[@muhammedjabisk6109]

@@analoglayoutdesign2342 sir I've completed all your videos, why you didn't uploading more videos related to layout? eagerly waiting

[@jayateerthar5224]

@@muhammedjabisk6109 I am busy with work... trying to get some time... once I get I will upload video

[@muhammedjabisk6109]

@@jayateerthar5224 thank you

[@mvrajuv]

When I'll upload the part2?

[@rajasekharnallamekala4950]

why we prefer interdigitized matching for current mirror can u explain in brief

[@analoglayoutdesign2342]

interdigitized matching should be fine for current mirror..bcos the current that we mirror itself will have 20% variation.... generally it will be PTAT current....that we use everywhere...from the BGR

[@Gkcptplm]

@@analoglayoutdesign2342 Could you please elaborate on the above statement ? Does this means ,if we are mirroring a 50uA current the mirrored branch can vary up to 60uA (20%) as worst case?

[@analoglayoutdesign2342]

@@Gkcptplm ..not thats not the meaning...your reference current ie. 50uA itself varies from 50uA to 60uA... generally we will have a PTAT current from BGR.. that will be used for biasing all blocks... so it varies for sure by that percentage....hope I answered...but however if the reference current itself is very accurate like in case of LED drivers etc, then current mirrors can be common centroid or cross coupled, meaning you match it in both x & Y

[@Gkcptplm]

@@analoglayoutdesign2342 How is the BGR reference is a PTAT? We cancel out the CTAT and PTAT to get BGR reference, rt? Will there be that big percentage of change in BGR current? Could you please enlighten me.

[@analoglayoutdesign2342]

@@Gkcptplm BGR voltage will have very less variation...but the current in the branch will have PTAT variation..